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author | Benjamin Maxwell <benjamin.maxwell@arm.com> | 2023-11-14 12:50:38 +0000 |
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committer | GitHub <noreply@github.com> | 2023-11-14 12:50:38 +0000 |
commit | 783ac3b6fb70ce88182a4dee1db0d3f5fb93953c (patch) | |
tree | 3438873dea5214a79d6a6e503594a29a5710a584 /mlir/test/lit.site.cfg.py.in | |
parent | 668454183a82404410fb575a565a90dac4ffb9f2 (diff) | |
download | llvm-783ac3b6fb70ce88182a4dee1db0d3f5fb93953c.zip llvm-783ac3b6fb70ce88182a4dee1db0d3f5fb93953c.tar.gz llvm-783ac3b6fb70ce88182a4dee1db0d3f5fb93953c.tar.bz2 |
[mlir][ArmSME] Make use of backend function attributes for enabling ZA storage (#71044)
Previously, we were inserting za.enable/disable intrinsics for functions
with the "arm_za" attribute (at the MLIR level), rather than using the
backend attributes. This was done to avoid a dependency on the SME ABI
functions from compiler-rt (which have only recently been implemented).
Doing things this way did have correctness issues, for example, calling
a streaming-mode function from another streaming-mode function (both
with ZA enabled) would lead to ZA being disabled after returning to the
caller (where it should still be enabled). Fixing issues like this would
require re-doing the ABI work already done in the backend within MLIR.
Instead, this patch switches to use the "arm_new_za" (backend) attribute
for enabling ZA for an MLIR function. For the integration tests, this
requires some way of linking the SME ABI functions. This is done via the
`%arm_sme_abi_shlib` lit substitution. By default, this expands to a
stub implementation of the SME ABI functions, but this can be overridden
by providing the `ARM_SME_ABI_ROUTINES_SHLIB` CMake cache variable
(pointing it at an alternative implementation). For now, the ArmSME
integration tests pass with just stubs, as we don't make use of nested
ZA-enabled calls.
A future patch may add an option to compiler-rt to build the SME
builtins into a standalone shared library to allow easily
building/testing with the actual implementation.
Diffstat (limited to 'mlir/test/lit.site.cfg.py.in')
-rw-r--r-- | mlir/test/lit.site.cfg.py.in | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in index 2de40ba..146e844 100644 --- a/mlir/test/lit.site.cfg.py.in +++ b/mlir/test/lit.site.cfg.py.in @@ -56,6 +56,7 @@ config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@" config.arm_emulator_mlir_cpu_runner_executable = "@ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE@" config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@" config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@" +config.arm_sme_abi_routines_shlib = "@ARM_SME_ABI_ROUTINES_SHLIB@" config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@" config.riscv_vector_emulator_options = "@RISCV_VECTOR_EMULATOR_OPTIONS@" config.riscv_emulator_lli_executable = "@RISCV_EMULATOR_LLI_EXECUTABLE@" |