diff options
| author | Harvin Iriawan <harvin.iriawan@arm.com> | 2023-07-28 14:13:35 +0100 |
|---|---|---|
| committer | Harvin Iriawan <harvin.iriawan@arm.com> | 2023-08-21 12:25:15 +0100 |
| commit | db158c7c830807caeeb0691739c41f1d522029e9 (patch) | |
| tree | 6626efdd7d4283e09c3bca745dd2cb6de4f158c7 /llvm/test/MachineVerifier | |
| parent | 955d7615bd7563cc78a5106215daf9e6e47ffb5e (diff) | |
| download | llvm-db158c7c830807caeeb0691739c41f1d522029e9.zip llvm-db158c7c830807caeeb0691739c41f1d522029e9.tar.gz llvm-db158c7c830807caeeb0691739c41f1d522029e9.tar.bz2 | |
[AArch64] Update generic sched model to A510
Refresh of the generic scheduling model to use A510 instead of A55.
Main benefits are to the little core, and introducing SVE scheduling information.
Changes tested on various OoO cores, no performance degradation is seen.
Differential Revision: https://reviews.llvm.org/D156799
Diffstat (limited to 'llvm/test/MachineVerifier')
| -rw-r--r-- | llvm/test/MachineVerifier/test_g_concat_vectors.mir | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/MachineVerifier/test_g_concat_vectors.mir b/llvm/test/MachineVerifier/test_g_concat_vectors.mir index b24401d..5c4de1b 100644 --- a/llvm/test/MachineVerifier/test_g_concat_vectors.mir +++ b/llvm/test/MachineVerifier/test_g_concat_vectors.mir @@ -1,4 +1,4 @@ -#RUN: not --crash llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +#RUN: not --crash llc -o - -global-isel -mtriple=aarch64 -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s # REQUIRES: aarch64-registered-target --- name: g_concat_vectors |