diff options
| author | Jon Roelofs <jonathan_roelofs@apple.com> | 2021-07-13 17:07:48 -0700 |
|---|---|---|
| committer | Jon Roelofs <jonathan_roelofs@apple.com> | 2021-07-20 17:32:29 -0700 |
| commit | be8738324c1aa9c9c56ae59cd113e29bba2c13e0 (patch) | |
| tree | db899b96bc62ab458416a675f1ca6715be41659f /llvm/test/MachineVerifier | |
| parent | 65cead410be042d7f627c806b985c30082bed704 (diff) | |
| download | llvm-be8738324c1aa9c9c56ae59cd113e29bba2c13e0.zip llvm-be8738324c1aa9c9c56ae59cd113e29bba2c13e0.tar.gz llvm-be8738324c1aa9c9c56ae59cd113e29bba2c13e0.tar.bz2 | |
[MachineVerifier] Diagnose invalid INSERT_SUBREGs
Differential revision: https://reviews.llvm.org/D105953
Diffstat (limited to 'llvm/test/MachineVerifier')
| -rw-r--r-- | llvm/test/MachineVerifier/test_insert_subreg.mir | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/llvm/test/MachineVerifier/test_insert_subreg.mir b/llvm/test/MachineVerifier/test_insert_subreg.mir new file mode 100644 index 0000000..f68c29e --- /dev/null +++ b/llvm/test/MachineVerifier/test_insert_subreg.mir @@ -0,0 +1,31 @@ +#RUN: not --crash llc -march=aarch64 -o - -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s +# REQUIRES: aarch64-registered-target + +--- +name: test_insert_subreg +legalized: true +regBankSelected: false +selected: false +tracksRegLiveness: true +liveins: +body: | + bb.0: + liveins: $s0, $h1 + + %0:fpr32 = COPY $s0 + + ; FIXME: we can't diagnose this case because the ARM backend treats fp16 + ; values as being ssub regs, creating a contradiction in the sizes. + ; CHECK-NOT: *** Bad machine code: + %1:fpr128 = IMPLICIT_DEF + %2:fpr128 = INSERT_SUBREG %1:fpr128, %0:fpr32, %subreg.hsub + + ; CHECK: *** Bad machine code: INSERT_SUBREG expected inserted value to have equal or lesser size than the subreg it was inserted into *** + %3:fpr128 = IMPLICIT_DEF + %4:fpr128 = INSERT_SUBREG %3:fpr128, %0:fpr32, %subreg.dsub + + ; CHECK-NOT: *** Bad machine code: + %7:fpr128 = IMPLICIT_DEF + %8:fpr128 = INSERT_SUBREG %7:fpr128, %0:fpr32, %subreg.ssub + +... |