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authorCraig Topper <craig.topper@sifive.com>2024-02-06 10:06:01 -0800
committerGitHub <noreply@github.com>2024-02-06 10:06:01 -0800
commit2faeea313fef284fa933e7adb1d4c44a33e943e5 (patch)
tree57014707f6f80d14ab9de6a9b0d0ede2bb6d7116 /llvm/test/MC
parent6eb7273b11e6a3ec7c5ddb2d55bc585a25c0a923 (diff)
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[RISCV] Add Ssqosid support to -march. (#80747)
Diffstat (limited to 'llvm/test/MC')
-rw-r--r--llvm/test/MC/RISCV/attribute-arch.s3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 342e632..368d8da 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -321,6 +321,9 @@
.attribute arch, "rv32i_sscounterenw1p0"
# CHECK: attribute 5, "rv32i2p1_sscounterenw1p0"
+.attribute arch, "rv32i_ssqosid1p0"
+# CHECK: attribute 5, "rv32i2p1_ssqosid1p0"
+
.attribute arch, "rv32i_ssstateen1p0"
# CHECK: attribute 5, "rv32i2p1_ssstateen1p0"