diff options
author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-03-15 13:09:57 -0700 |
---|---|---|
committer | Michael Maitland <michaeltmaitland@gmail.com> | 2024-03-25 10:35:21 -0700 |
commit | 973e9dbd57bcdfcc3e0deef37d1c37fc4fbbb856 (patch) | |
tree | 9575e57294a8abcaa299cd040c7543904d216450 /llvm/test/CodeGen/RISCV | |
parent | 8c51ac9ddb026ca247b25b08b1d08e32b1ed58ec (diff) | |
download | llvm-973e9dbd57bcdfcc3e0deef37d1c37fc4fbbb856.zip llvm-973e9dbd57bcdfcc3e0deef37d1c37fc4fbbb856.tar.gz llvm-973e9dbd57bcdfcc3e0deef37d1c37fc4fbbb856.tar.bz2 |
[RISCV][GISEL] Regbank select for scalable G_SELECT
Diffstat (limited to 'llvm/test/CodeGen/RISCV')
-rw-r--r-- | llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir | 558 |
1 files changed, 558 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir new file mode 100644 index 0000000..4dc077a --- /dev/null +++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/rvv/select.mir @@ -0,0 +1,558 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=riscv32 -mattr=+m,+v -run-pass=regbankselect \ +# RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \ +# RUN: -o - | FileCheck -check-prefix=RV32I %s +# RUN: llc -mtriple=riscv64 -mattr=+m,+v -run-pass=regbankselect \ +# RUN: -disable-gisel-legality-check -simplify-mir -verify-machineinstrs %s \ +# RUN: -o - | FileCheck -check-prefix=RV64I %s + +--- +name: select_nxv1i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv1i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv1i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s8>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 1 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 1 x s8>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s8>), %2(<vscale x 1 x s8>) + $v8 = COPY %0(<vscale x 1 x s8>) + PseudoRET implicit $v8 +... +--- +name: select_nxv2i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv2i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv2i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s8>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 2 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 2 x s8>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s8>), %2(<vscale x 2 x s8>) + $v8 = COPY %0(<vscale x 2 x s8>) + PseudoRET implicit $v8 +... +--- +name: select_nxv4i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv4i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv4i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s8>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 4 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 4 x s8>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s8>), %2(<vscale x 4 x s8>) + $v8 = COPY %0(<vscale x 4 x s8>) + PseudoRET implicit $v8 +... +--- +name: select_nxv8i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv8i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 8 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv8i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s8>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 8 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 8 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 8 x s8>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s8>), %2(<vscale x 8 x s8>) + $v8 = COPY %0(<vscale x 8 x s8>) + PseudoRET implicit $v8 +... +--- +name: select_nxv16i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv16i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 16 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8m2 + ; + ; RV64I-LABEL: name: select_nxv16i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s8>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 16 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8m2 + %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 16 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 16 x s8>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s8>), %2(<vscale x 16 x s8>) + $v8m2 = COPY %0(<vscale x 16 x s8>) + PseudoRET implicit $v8m2 +... +--- +name: select_nxv32i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv32i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 32 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8m4 + ; + ; RV64I-LABEL: name: select_nxv32i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 32 x s8>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 32 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8m4 + %1:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 32 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 32 x s8>) = G_SELECT %1(<vscale x 32 x s1>), %2(<vscale x 32 x s8>), %2(<vscale x 32 x s8>) + $v8m4 = COPY %0(<vscale x 32 x s8>) + PseudoRET implicit $v8m4 +... +--- +name: select_nxv64i8 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv64i8 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_SELECT [[DEF]](<vscale x 64 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 64 x s8>) + ; RV32I-NEXT: PseudoRET implicit $v8m8 + ; + ; RV64I-LABEL: name: select_nxv64i8 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 64 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 64 x s8>) = G_SELECT [[DEF]](<vscale x 64 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 64 x s8>) + ; RV64I-NEXT: PseudoRET implicit $v8m8 + %1:_(<vscale x 64 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 64 x s8>) = G_IMPLICIT_DEF + %0:_(<vscale x 64 x s8>) = G_SELECT %1(<vscale x 64 x s1>), %2(<vscale x 64 x s8>), %2(<vscale x 64 x s8>) + $v8m8 = COPY %0(<vscale x 64 x s8>) + PseudoRET implicit $v8m8 +... +--- +name: select_nxv1i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv1i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv1i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s16>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 1 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 1 x s16>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s16>), %2(<vscale x 1 x s16>) + $v8 = COPY %0(<vscale x 1 x s16>) + PseudoRET implicit $v8 +... +--- +name: select_nxv2i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv2i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv2i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s16>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 2 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 2 x s16>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s16>), %2(<vscale x 2 x s16>) + $v8 = COPY %0(<vscale x 2 x s16>) + PseudoRET implicit $v8 +... +--- +name: select_nxv4i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv4i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv4i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s16>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 4 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 4 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 4 x s16>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s16>), %2(<vscale x 4 x s16>) + $v8 = COPY %0(<vscale x 4 x s16>) + PseudoRET implicit $v8 +... +--- +name: select_nxv8i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv8i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 8 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8m2 + ; + ; RV64I-LABEL: name: select_nxv8i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s16>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 8 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8m2 + %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 8 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 8 x s16>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s16>), %2(<vscale x 8 x s16>) + $v8m2 = COPY %0(<vscale x 8 x s16>) + PseudoRET implicit $v8m2 +... +--- +name: select_nxv16i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv16i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 16 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8m4 + ; + ; RV64I-LABEL: name: select_nxv16i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s16>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 16 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8m4 + %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 16 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 16 x s16>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s16>), %2(<vscale x 16 x s16>) + $v8m4 = COPY %0(<vscale x 16 x s16>) + PseudoRET implicit $v8m4 +... +--- +name: select_nxv32i16 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv32i16 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 32 x s16>) + ; RV32I-NEXT: PseudoRET implicit $v8m8 + ; + ; RV64I-LABEL: name: select_nxv32i16 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 32 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 32 x s16>) = G_SELECT [[DEF]](<vscale x 32 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 32 x s16>) + ; RV64I-NEXT: PseudoRET implicit $v8m8 + %1:_(<vscale x 32 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 32 x s16>) = G_IMPLICIT_DEF + %0:_(<vscale x 32 x s16>) = G_SELECT %1(<vscale x 32 x s1>), %2(<vscale x 32 x s16>), %2(<vscale x 32 x s16>) + $v8m8 = COPY %0(<vscale x 32 x s16>) + PseudoRET implicit $v8m8 +... +--- +name: select_nxv1i32 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv1i32 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s32>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv1i32 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s32>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s32>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 1 x s32>) = G_IMPLICIT_DEF + %0:_(<vscale x 1 x s32>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s32>), %2(<vscale x 1 x s32>) + $v8 = COPY %0(<vscale x 1 x s32>) + PseudoRET implicit $v8 +... +--- +name: select_nxv2i32 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv2i32 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s32>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv2i32 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s32>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 2 x s32>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 2 x s32>) = G_IMPLICIT_DEF + %0:_(<vscale x 2 x s32>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s32>), %2(<vscale x 2 x s32>) + $v8 = COPY %0(<vscale x 2 x s32>) + PseudoRET implicit $v8 +... +--- +name: select_nxv4i32 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv4i32 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 4 x s32>) + ; RV32I-NEXT: PseudoRET implicit $v8m2 + ; + ; RV64I-LABEL: name: select_nxv4i32 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s32>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 4 x s32>) + ; RV64I-NEXT: PseudoRET implicit $v8m2 + %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 4 x s32>) = G_IMPLICIT_DEF + %0:_(<vscale x 4 x s32>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s32>), %2(<vscale x 4 x s32>) + $v8m2 = COPY %0(<vscale x 4 x s32>) + PseudoRET implicit $v8m2 +... +--- +name: select_nxv8i32 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv8i32 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 8 x s32>) + ; RV32I-NEXT: PseudoRET implicit $v8m4 + ; + ; RV64I-LABEL: name: select_nxv8i32 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s32>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 8 x s32>) + ; RV64I-NEXT: PseudoRET implicit $v8m4 + %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 8 x s32>) = G_IMPLICIT_DEF + %0:_(<vscale x 8 x s32>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s32>), %2(<vscale x 8 x s32>) + $v8m4 = COPY %0(<vscale x 8 x s32>) + PseudoRET implicit $v8m4 +... +--- +name: select_nxv16i32 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv16i32 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 16 x s32>) + ; RV32I-NEXT: PseudoRET implicit $v8m8 + ; + ; RV64I-LABEL: name: select_nxv16i32 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 16 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 16 x s32>) = G_SELECT [[DEF]](<vscale x 16 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 16 x s32>) + ; RV64I-NEXT: PseudoRET implicit $v8m8 + %1:_(<vscale x 16 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 16 x s32>) = G_IMPLICIT_DEF + %0:_(<vscale x 16 x s32>) = G_SELECT %1(<vscale x 16 x s1>), %2(<vscale x 16 x s32>), %2(<vscale x 16 x s32>) + $v8m8 = COPY %0(<vscale x 16 x s32>) + PseudoRET implicit $v8m8 +... +--- +name: select_nxv1i64 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv1i64 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s64>) + ; RV32I-NEXT: PseudoRET implicit $v8 + ; + ; RV64I-LABEL: name: select_nxv1i64 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 1 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 1 x s64>) = G_SELECT [[DEF]](<vscale x 1 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8 = COPY [[SELECT]](<vscale x 1 x s64>) + ; RV64I-NEXT: PseudoRET implicit $v8 + %1:_(<vscale x 1 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 1 x s64>) = G_IMPLICIT_DEF + %0:_(<vscale x 1 x s64>) = G_SELECT %1(<vscale x 1 x s1>), %2(<vscale x 1 x s64>), %2(<vscale x 1 x s64>) + $v8 = COPY %0(<vscale x 1 x s64>) + PseudoRET implicit $v8 +... +--- +name: select_nxv2i64 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv2i64 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 2 x s64>) + ; RV32I-NEXT: PseudoRET implicit $v8m2 + ; + ; RV64I-LABEL: name: select_nxv2i64 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 2 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 2 x s64>) = G_SELECT [[DEF]](<vscale x 2 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m2 = COPY [[SELECT]](<vscale x 2 x s64>) + ; RV64I-NEXT: PseudoRET implicit $v8m2 + %1:_(<vscale x 2 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 2 x s64>) = G_IMPLICIT_DEF + %0:_(<vscale x 2 x s64>) = G_SELECT %1(<vscale x 2 x s1>), %2(<vscale x 2 x s64>), %2(<vscale x 2 x s64>) + $v8m2 = COPY %0(<vscale x 2 x s64>) + PseudoRET implicit $v8m2 +... +--- +name: select_nxv4i64 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv4i64 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 4 x s64>) + ; RV32I-NEXT: PseudoRET implicit $v8m4 + ; + ; RV64I-LABEL: name: select_nxv4i64 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 4 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 4 x s64>) = G_SELECT [[DEF]](<vscale x 4 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m4 = COPY [[SELECT]](<vscale x 4 x s64>) + ; RV64I-NEXT: PseudoRET implicit $v8m4 + %1:_(<vscale x 4 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 4 x s64>) = G_IMPLICIT_DEF + %0:_(<vscale x 4 x s64>) = G_SELECT %1(<vscale x 4 x s1>), %2(<vscale x 4 x s64>), %2(<vscale x 4 x s64>) + $v8m4 = COPY %0(<vscale x 4 x s64>) + PseudoRET implicit $v8m4 +... +--- +name: select_nxv8i64 +legalized: true +tracksRegLiveness: true +body: | + bb.0.entry: + ; RV32I-LABEL: name: select_nxv8i64 + ; RV32I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF + ; RV32I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV32I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 8 x s64>) + ; RV32I-NEXT: PseudoRET implicit $v8m8 + ; + ; RV64I-LABEL: name: select_nxv8i64 + ; RV64I: [[DEF:%[0-9]+]]:vrb(<vscale x 8 x s1>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[DEF1:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_IMPLICIT_DEF + ; RV64I-NEXT: [[SELECT:%[0-9]+]]:vrb(<vscale x 8 x s64>) = G_SELECT [[DEF]](<vscale x 8 x s1>), [[DEF1]], [[DEF1]] + ; RV64I-NEXT: $v8m8 = COPY [[SELECT]](<vscale x 8 x s64>) + ; RV64I-NEXT: PseudoRET implicit $v8m8 + %1:_(<vscale x 8 x s1>) = G_IMPLICIT_DEF + %2:_(<vscale x 8 x s64>) = G_IMPLICIT_DEF + %0:_(<vscale x 8 x s64>) = G_SELECT %1(<vscale x 8 x s1>), %2(<vscale x 8 x s64>), %2(<vscale x 8 x s64>) + $v8m8 = COPY %0(<vscale x 8 x s64>) + PseudoRET implicit $v8m8 +... |