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| author | George Koehler <kernigh@gmail.com> | 2024-03-02 22:18:24 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-02 22:18:24 -0500 |
| commit | 6b70c5d79fe44cbe01b0443454c6952c5b541585 (patch) | |
| tree | 6d202ecc909781956a4881cbd48b3c215977c1cb /llvm/test/CodeGen/PowerPC | |
| parent | 6594f428de91e333c1cbea4f55e79b18d31024c4 (diff) | |
| download | llvm-6b70c5d79fe44cbe01b0443454c6952c5b541585.zip llvm-6b70c5d79fe44cbe01b0443454c6952c5b541585.tar.gz llvm-6b70c5d79fe44cbe01b0443454c6952c5b541585.tar.bz2 | |
[PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (#83098)
Delete the code that skips the CFI for the condition register on ELF32.
The code checked !MustSaveCR, which happened only when
Subtarget.is32BitELFABI(), where spillCalleeSavedRegisters is spilling
cr in a different way. The spill was missing CFI. After deleting this
code, a spill of cr2 to cr4 gets CFI in the same way as a spill of r14
to r31.
Fixes #83094
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/crsave.ll | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/crsave.ll b/llvm/test/CodeGen/PowerPC/crsave.ll index bde49d0..05da108 100644 --- a/llvm/test/CodeGen/PowerPC/crsave.ll +++ b/llvm/test/CodeGen/PowerPC/crsave.ll @@ -17,6 +17,7 @@ define i32 @test_cr2() nounwind uwtable { ; PPC32-NEXT: .cfi_offset lr, 4 ; PPC32-NEXT: mr 31, 1 ; PPC32-NEXT: .cfi_def_cfa_register r31 +; PPC32-NEXT: .cfi_offset cr2, -8 ; PPC32-NEXT: mfcr 12 ; PPC32-NEXT: stw 12, 24(31) ; PPC32-NEXT: li 3, 1 @@ -227,6 +228,7 @@ define void @cloberOneNvCrField() { ; PPC32-NEXT: .cfi_offset r31, -4 ; PPC32-NEXT: mr 31, 1 ; PPC32-NEXT: .cfi_def_cfa_register r31 +; PPC32-NEXT: .cfi_offset cr2, -8 ; PPC32-NEXT: mfcr 12 ; PPC32-NEXT: stw 12, 24(31) ; PPC32-NEXT: #APP @@ -274,6 +276,9 @@ define void @cloberAllNvCrField() { ; PPC32-NEXT: .cfi_offset r31, -4 ; PPC32-NEXT: mr 31, 1 ; PPC32-NEXT: .cfi_def_cfa_register r31 +; PPC32-NEXT: .cfi_offset cr2, -8 +; PPC32-NEXT: .cfi_offset cr3, -8 +; PPC32-NEXT: .cfi_offset cr4, -8 ; PPC32-NEXT: mfcr 12 ; PPC32-NEXT: stw 12, 24(31) ; PPC32-NEXT: #APP |