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author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:13:24 +0000 |
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committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:13:24 +0000 |
commit | 34ad780d0defc72e8d880cc2050a66200201227f (patch) | |
tree | a6725e4e834bba26b47c0f76224cbcde9a367a5a /llvm/lib/Target/SystemZ/SystemZOperands.td | |
parent | 6759661c3f6cfeb4d68a7fb0efa30ec62b28e998 (diff) | |
download | llvm-34ad780d0defc72e8d880cc2050a66200201227f.zip llvm-34ad780d0defc72e8d880cc2050a66200201227f.tar.gz llvm-34ad780d0defc72e8d880cc2050a66200201227f.tar.bz2 |
32 bit shifts have only 12 bit displacements
llvm-svn: 76000
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZOperands.td')
-rw-r--r-- | llvm/lib/Target/SystemZ/SystemZOperands.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZOperands.td b/llvm/lib/Target/SystemZ/SystemZOperands.td index 495a9d5..d783050 100644 --- a/llvm/lib/Target/SystemZ/SystemZOperands.td +++ b/llvm/lib/Target/SystemZ/SystemZOperands.td @@ -252,7 +252,7 @@ def s32imm64 : Operand<i64> { // riaddr := reg + imm def riaddr32 : Operand<i32>, - ComplexPattern<i32, 2, "SelectAddrRI12", []> { + ComplexPattern<i32, 2, "SelectAddrRI12Only", []> { let PrintMethod = "printRIAddrOperand"; let MIOperandInfo = (ops ADDR32:$base, u12imm:$disp); } |