diff options
| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2022-12-16 08:57:11 -0600 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2022-12-16 08:57:36 -0600 |
| commit | cb3f415cd2019df7d14683842198bc4b7a492bc5 (patch) | |
| tree | 1bae9028c1666cf9ac0e4a36d6094c40b7611f4e /llvm/lib/CodeGen | |
| parent | 29fa062f0a2aeeb37e644887eb1be8c458c981b2 (diff) | |
| download | llvm-cb3f415cd2019df7d14683842198bc4b7a492bc5.zip llvm-cb3f415cd2019df7d14683842198bc4b7a492bc5.tar.gz llvm-cb3f415cd2019df7d14683842198bc4b7a492bc5.tar.bz2 | |
[PowerPC] Fix up memory ordering after combining BV to a load
The combiner for BUILD_VECTOR that merges consecutive
loads into a wide load had two issues:
- It didn't check that the input loads all have the
same input chain
- It didn't update nodes that are chained to the original
loads to be chained to the new load
This caused issues with bootstrap when
3c4d2a03968ccf5889bacffe02d6fa2443b0260f was committed.
This patch fixes the issue so it can unblock this commit.
Differential revision: https://reviews.llvm.org/D140046
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index e9f61e7..a39d0a5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -11497,7 +11497,7 @@ bool SelectionDAG::areNonVolatileConsecutiveLoads(LoadSDNode *LD, return false; if (LD->getChain() != Base->getChain()) return false; - EVT VT = LD->getValueType(0); + EVT VT = LD->getMemoryVT(); if (VT.getSizeInBits() / 8 != Bytes) return false; |