diff options
| author | Daniel Kiss <daniel.kiss@arm.com> | 2022-05-13 09:12:07 +0200 |
|---|---|---|
| committer | Daniel Kiss <daniel.kiss@arm.com> | 2022-05-13 10:05:59 +0200 |
| commit | f6366ef7f4f3cf1182fd70e0c50a9fa54374b612 (patch) | |
| tree | 9f64274ab073b29d58db5b4b1f1151925ecc4a3f /libunwind/src | |
| parent | 094fb13b88b36ecfa475cb877d2c6e9d90b4d1a5 (diff) | |
| download | llvm-f6366ef7f4f3cf1182fd70e0c50a9fa54374b612.zip llvm-f6366ef7f4f3cf1182fd70e0c50a9fa54374b612.tar.gz llvm-f6366ef7f4f3cf1182fd70e0c50a9fa54374b612.tar.bz2 | |
[libunwind][AArch64] Add support for DWARF expression for RA_SIGN_STATE.
Program may set the RA_SIGN_STATE pseudo register by expressions.
Libunwind expected only the DW_CFA_AARCH64_negate_ra_state could change the value
of the register which leads to runtime errors on PAC enabled systems.
In the recent version of the aadwarf64[1] a limitation is added[2] to forbid the mixing the
DW_CFA_AARCH64_negate_ra_state with other DWARF Register Rule Instructions.
[1] https://github.com/ARM-software/abi-aa/releases/tag/2022Q1
[2] https://github.com/ARM-software/abi-aa/pull/129
Reviewed By: #libunwind, MaskRay
Differential Revision: https://reviews.llvm.org/D123692
Diffstat (limited to 'libunwind/src')
| -rw-r--r-- | libunwind/src/DwarfInstructions.hpp | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/libunwind/src/DwarfInstructions.hpp b/libunwind/src/DwarfInstructions.hpp index ab83b0c..865a489 100644 --- a/libunwind/src/DwarfInstructions.hpp +++ b/libunwind/src/DwarfInstructions.hpp @@ -72,6 +72,10 @@ private: assert(0 && "getCFA(): unknown location"); __builtin_unreachable(); } +#if defined(_LIBUNWIND_TARGET_AARCH64) + static bool getRA_SIGN_STATE(A &addressSpace, R registers, pint_t cfa, + PrologInfo &prolog); +#endif }; template <typename R> @@ -166,6 +170,21 @@ v128 DwarfInstructions<A, R>::getSavedVectorRegister( } _LIBUNWIND_ABORT("unsupported restore location for vector register"); } +#if defined(_LIBUNWIND_TARGET_AARCH64) +template <typename A, typename R> +bool DwarfInstructions<A, R>::getRA_SIGN_STATE(A &addressSpace, R registers, + pint_t cfa, PrologInfo &prolog) { + pint_t raSignState; + auto regloc = prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE]; + if (regloc.location == CFI_Parser<A>::kRegisterUnused) + raSignState = regloc.value; + else + raSignState = getSavedRegister(addressSpace, registers, cfa, regloc); + + // Only bit[0] is meaningful. + return raSignState & 0x01; +} +#endif template <typename A, typename R> int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc, @@ -235,7 +254,7 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc, // restored. autia1716 is used instead of autia as autia1716 assembles // to a NOP on pre-v8.3a architectures. if ((R::getArch() == REGISTERS_ARM64) && - prolog.savedRegisters[UNW_AARCH64_RA_SIGN_STATE].value && + getRA_SIGN_STATE(addressSpace, registers, cfa, prolog) && returnAddress != 0) { #if !defined(_LIBUNWIND_IS_NATIVE_ONLY) return UNW_ECROSSRASIGNING; |