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| author | Craig Topper <craig.topper@sifive.com> | 2021-04-05 21:25:52 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-04-05 21:28:32 -0700 |
| commit | cb1028a0b95f5f4dd3924d81e8f8d9198b597ff4 (patch) | |
| tree | 3d1cd3e7f8b27a0bafba795a9d35879c74948a3d /clang/unittests/Frontend/CompilerInvocationTest.cpp | |
| parent | 58ccbd0d08fe0a9b4b06d47d0be20f19717919f8 (diff) | |
| download | llvm-cb1028a0b95f5f4dd3924d81e8f8d9198b597ff4.zip llvm-cb1028a0b95f5f4dd3924d81e8f8d9198b597ff4.tar.gz llvm-cb1028a0b95f5f4dd3924d81e8f8d9198b597ff4.tar.bz2 | |
[RISCV] When custom iseling masked stores, copy the mask into V0 instead of virtual register.
I missed a few intrinsics in 3dd4aa7d09599507d1f801ffe4bec4c9eebbb8da
when I did this for masked loads and masked segment loads/stores.
Found while trying to share more code between these custom isel
functions.
Diffstat (limited to 'clang/unittests/Frontend/CompilerInvocationTest.cpp')
0 files changed, 0 insertions, 0 deletions