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author | Bill Wendling <isanbard@gmail.com> | 2013-12-07 23:59:52 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-12-07 23:59:52 +0000 |
commit | 4ec99d3892955aeb95084429aca196100b28a5da (patch) | |
tree | 8c81312b8ace243a1482dcf19b11426e23891125 /clang/test | |
parent | 3d6588e1790dcd13d48e7e4f6c5fbcda0b8d06b1 (diff) | |
download | llvm-4ec99d3892955aeb95084429aca196100b28a5da.zip llvm-4ec99d3892955aeb95084429aca196100b28a5da.tar.gz llvm-4ec99d3892955aeb95084429aca196100b28a5da.tar.bz2 |
Merging r196189:
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r196189 | jiangning | 2013-12-02 17:28:55 -0800 (Mon, 02 Dec 2013) | 2 lines
Add some missing AArch64 Neon intrinsics like vmull_high_n_s16 and friends.
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llvm-svn: 196671
Diffstat (limited to 'clang/test')
-rw-r--r-- | clang/test/CodeGen/aarch64-neon-2velem.c | 149 |
1 files changed, 149 insertions, 0 deletions
diff --git a/clang/test/CodeGen/aarch64-neon-2velem.c b/clang/test/CodeGen/aarch64-neon-2velem.c index 36166a4..03f7df7 100644 --- a/clang/test/CodeGen/aarch64-neon-2velem.c +++ b/clang/test/CodeGen/aarch64-neon-2velem.c @@ -1547,3 +1547,152 @@ float64x2_t test_vmulxq_laneq_f64_0(float64x2_t a, float64x2_t v) { // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0] } +int32x4_t test_vmull_high_n_s16(int16x8_t a, int16_t b) { + // CHECK: test_vmull_high_n_s16 + return vmull_high_n_s16(a, b); + // CHECK: smull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vmull_high_n_s32(int32x4_t a, int32_t b) { + // CHECK: test_vmull_high_n_s32 + return vmull_high_n_s32(a, b); + // CHECK: smull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +uint32x4_t test_vmull_high_n_u16(uint16x8_t a, uint16_t b) { + // CHECK: test_vmull_high_n_u16 + return vmull_high_n_u16(a, b); + // CHECK: umull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +uint64x2_t test_vmull_high_n_u32(uint32x4_t a, uint32_t b) { + // CHECK: test_vmull_high_n_u32 + return vmull_high_n_u32(a, b); + // CHECK: umull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +int32x4_t test_vqdmull_high_n_s16(int16x8_t a, int16_t b) { + // CHECK: test_vqdmull_high_n_s16 + return vqdmull_high_n_s16(a, b); + // CHECK: sqdmull2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vqdmull_high_n_s32(int32x4_t a, int32_t b) { + // CHECK: test_vqdmull_high_n_s32 + return vqdmull_high_n_s32(a, b); + // CHECK: sqdmull2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +int32x4_t test_vmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { + // CHECK: test_vmlal_high_n_s16 + return vmlal_high_n_s16(a, b, c); + // CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { + // CHECK: test_vmlal_high_n_s32 + return vmlal_high_n_s32(a, b, c); + // CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +uint32x4_t test_vmlal_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) { + // CHECK: test_vmlal_high_n_u16 + return vmlal_high_n_u16(a, b, c); + // CHECK: umlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +uint64x2_t test_vmlal_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) { + // CHECK: test_vmlal_high_n_u32 + return vmlal_high_n_u32(a, b, c); + // CHECK: umlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +int32x4_t test_vqdmlal_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { + // CHECK: test_vqdmlal_high_n_s16 + return vqdmlal_high_n_s16(a, b, c); + // CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vqdmlal_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { + // CHECK: test_vqdmlal_high_n_s32 + return vqdmlal_high_n_s32(a, b, c); + // CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +int32x4_t test_vmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { + // CHECK: test_vmlsl_high_n_s16 + return vmlsl_high_n_s16(a, b, c); + // CHECK: smlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { + // CHECK: test_vmlsl_high_n_s32 + return vmlsl_high_n_s32(a, b, c); + // CHECK: smlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +uint32x4_t test_vmlsl_high_n_u16(uint32x4_t a, uint16x8_t b, uint16_t c) { + // CHECK: test_vmlsl_high_n_u16 + return vmlsl_high_n_u16(a, b, c); + // CHECK: umlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +uint64x2_t test_vmlsl_high_n_u32(uint64x2_t a, uint32x4_t b, uint32_t c) { + // CHECK: test_vmlsl_high_n_u32 + return vmlsl_high_n_u32(a, b, c); + // CHECK: umlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +int32x4_t test_vqdmlsl_high_n_s16(int32x4_t a, int16x8_t b, int16_t c) { + // CHECK: test_vqdmlsl_high_n_s16 + return vqdmlsl_high_n_s16(a, b, c); + // CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.h[0] +} + +int64x2_t test_vqdmlsl_high_n_s32(int64x2_t a, int32x4_t b, int32_t c) { + // CHECK: test_vqdmlsl_high_n_s32 + return vqdmlsl_high_n_s32(a, b, c); + // CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +float32x2_t test_vmul_n_f32(float32x2_t a, float32_t b) { + // CHECK: test_vmul_n_f32 + return vmul_n_f32(a, b); + // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0] +} + +float32x4_t test_vmulq_n_f32(float32x4_t a, float32_t b) { + // CHECK: test_vmulq_n_f32 + return vmulq_n_f32(a, b); + // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +float64x2_t test_vmulq_n_f64(float64x2_t a, float64_t b) { + // CHECK: test_vmulq_n_f64 + return vmulq_n_f64(a, b); + // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.d[0] +} + +float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) { + // CHECK: test_vfma_n_f32 + return vfma_n_f32(a, b, n); + // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0] +} + +float32x4_t test_vfmaq_n_f32(float32x4_t a, float32x4_t b, float32_t n) { + // CHECK: test_vfmaq_n_f32 + return vfmaq_n_f32(a, b, n); + // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} + +float32x2_t test_vfms_n_f32(float32x2_t a, float32x2_t b, float32_t n) { + // CHECK: test_vfms_n_f32 + return vfms_n_f32(a, b, n); + // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[0] +} + +float32x4_t test_vfmsq_n_f32(float32x4_t a, float32x4_t b, float32_t n) { + // CHECK: test_vfmsq_n_f32 + return vfmsq_n_f32(a, b, n); + // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.s[0] +} |