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author | Alex Bradbury <asb@igalia.com> | 2022-08-19 18:16:24 +0100 |
---|---|---|
committer | Tobias Hieta <tobias@hieta.se> | 2022-08-22 11:35:31 +0200 |
commit | 43fb0d7193ad13200db4048b3d266ecb8ba0fc2c (patch) | |
tree | ef5aaa83c94a18a0887e17545f608b4dd7a1d2eb /clang/test | |
parent | 89be541e31b04b07298ea86922550b09b90a7d1a (diff) | |
download | llvm-43fb0d7193ad13200db4048b3d266ecb8ba0fc2c.zip llvm-43fb0d7193ad13200db4048b3d266ecb8ba0fc2c.tar.gz llvm-43fb0d7193ad13200db4048b3d266ecb8ba0fc2c.tar.bz2 |
[clang][RISCV] Fix incorrect ABI lowering for inherited structs under hard-float ABIs
The hard float ABIs have a rule that if a flattened struct contains
either a single fp value, or an int+fp, or fp+fp then it may be passed
in a pair of registers (if sufficient GPRs+FPRs are available).
detectFPCCEligibleStruct and the helper it calls,
detectFPCCEligibleStructHelper examine the type of the argument/return
value to determine if it complies with the requirements for this ABI
rule.
As reported in bug #57084, this logic produces incorrect results for C++
structs that inherit from other structs. This is because only the fields
of the struct were examined, but enumerating RD->fields misses any
fields in inherited C++ structs. This patch corrects that issue by
adding appropriate logic to enumerate any included base structs.
Differential Revision: https://reviews.llvm.org/D131677
(cherry picked from commit bc538320809fb52af12ec0366118c82201af4f40)
Diffstat (limited to 'clang/test')
-rw-r--r-- | clang/test/CodeGen/RISCV/riscv-abi.cpp | 69 |
1 files changed, 52 insertions, 17 deletions
diff --git a/clang/test/CodeGen/RISCV/riscv-abi.cpp b/clang/test/CodeGen/RISCV/riscv-abi.cpp index ba9e61b..7e34ffe 100644 --- a/clang/test/CodeGen/RISCV/riscv-abi.cpp +++ b/clang/test/CodeGen/RISCV/riscv-abi.cpp @@ -1,15 +1,15 @@ -// RUN: %clang_cc1 -triple riscv32 -emit-llvm -x c++ %s -o - \ +// RUN: %clang_cc1 -triple riscv32 -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=ILP32,ILP32-ILP32F,ILP32-ILP32F-ILP32D %s -// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm -x c++ %s -o - \ +// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-abi ilp32f -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=ILP32F,ILP32-ILP32F,ILP32F-ILP32D,ILP32-ILP32F-ILP32D %s -// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-feature +d -target-abi ilp32d -emit-llvm %s -x c++ -o - \ +// RUN: %clang_cc1 -triple riscv32 -target-feature +f -target-feature +d -target-abi ilp32d -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=ILP32D,ILP32F-ILP32D,ILP32-ILP32F-ILP32D %s -// RUN: %clang_cc1 -triple riscv64 -emit-llvm -x c++ %s -o - \ +// RUN: %clang_cc1 -triple riscv64 -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=LP64,LP64-LP64F,LP64-LP64F-LP64D %s -// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm -x c++ %s -o - \ +// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-abi lp64f -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=LP64F,LP64-LP64F,LP64F-LP64D,LP64-LP64F-LP64D %s -// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-abi lp64d -emit-llvm %s -x c++ -o - \ +// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-abi lp64d -emit-llvm %s -o - \ // RUN: | FileCheck -check-prefixes=LP64D,LP64F-LP64D,LP64-LP64F-LP64D %s #include <stdint.h> @@ -39,12 +39,10 @@ struct child2_float_s : parent2_int32_s { float f1; }; -// TODO: Fix incorrect lowering for hard-float ABIs. - // ILP32: define{{.*}} [2 x i32] @_Z30int32_float_struct_inheritance14child2_float_s([2 x i32] %a.coerce) -// ILP32F-ILP32D: define{{.*}} float @_Z30int32_float_struct_inheritance14child2_float_s(float %0) +// ILP32F-ILP32D: define{{.*}} { i32, float } @_Z30int32_float_struct_inheritance14child2_float_s(i32 %0, float %1) // LP64: define{{.*}} i64 @_Z30int32_float_struct_inheritance14child2_float_s(i64 %a.coerce) -// LP64F-LP64D: define{{.*}} float @_Z30int32_float_struct_inheritance14child2_float_s(float %0) +// LP64F-LP64D: define{{.*}} { i32, float } @_Z30int32_float_struct_inheritance14child2_float_s(i32 %0, float %1) struct child2_float_s int32_float_struct_inheritance(struct child2_float_s a) { return a; } @@ -57,10 +55,9 @@ struct child3_int64_s : parent3_float_s { int64_t i1; }; -// TODO: Fix incorrect lowering for lp64f/lp64d ABIs. - // ILP32-ILP32F-ILP32D-LABEL: define{{.*}} void @_Z30float_int64_struct_inheritance14child3_int64_s(ptr noalias sret(%struct.child3_int64_s) -// LP64-LP64F-LP64D-LABEL: define{{.*}} [2 x i64] @_Z30float_int64_struct_inheritance14child3_int64_s([2 x i64] %a.coerce) +// LP64-LABEL: define{{.*}} [2 x i64] @_Z30float_int64_struct_inheritance14child3_int64_s([2 x i64] %a.coerce) +// LP64F-LP64D-LABEL: define{{.*}} { float, i64 } @_Z30float_int64_struct_inheritance14child3_int64_s(float %0, i64 %1) struct child3_int64_s float_int64_struct_inheritance(struct child3_int64_s a) { return a; } @@ -73,16 +70,54 @@ struct child4_double_s : parent4_double_s { double d1; }; -// TODO: Fix incorrect lowering for ilp32d/lp64d ABIs. - // ILP32-ILP32F-LABEL: define{{.*}} void @_Z32double_double_struct_inheritance15child4_double_s(ptr noalias sret(%struct.child4_double_s) -// ILP32D-LABEL: define{{.*}} double @_Z32double_double_struct_inheritance15child4_double_s(double %0) +// ILP32D-LABEL: define{{.*}} { double, double } @_Z32double_double_struct_inheritance15child4_double_s(double %0, double %1) // LP64-LP64F-LABEL: define{{.*}} [2 x i64] @_Z32double_double_struct_inheritance15child4_double_s([2 x i64] %a.coerce) -// LP64D-LABEL: define{{.*}} double @_Z32double_double_struct_inheritance15child4_double_s(double %0) +// LP64D-LABEL: define{{.*}} { double, double } @_Z32double_double_struct_inheritance15child4_double_s(double %0, double %1) struct child4_double_s double_double_struct_inheritance(struct child4_double_s a) { return a; } +// When virtual inheritance is used, the resulting struct isn't eligible for +// passing in registers. + +struct parent5_virtual_s { + int32_t i1; +}; + +struct child5_virtual_s : virtual parent5_virtual_s { + float f1; +}; + +// ILP32-ILP32F-ILP32D-LABEL: define{{.*}} void @_ZN16child5_virtual_sC1EOS_(ptr noundef nonnull align 4 dereferenceable(8) %this, ptr noundef nonnull align 4 dereferenceable(8) %0) +// LP64-LP64F-LP64D-LABEL: define{{.*}} void @_ZN16child5_virtual_sC1EOS_(ptr noundef nonnull align 8 dereferenceable(12) %this, ptr noundef nonnull align 8 dereferenceable(12) %0) +struct child5_virtual_s int32_float_virtual_struct_inheritance(struct child5_virtual_s a) { + return a; +} + +// Check for correct lowering in the presence of diamond inheritance. + +struct parent6_float_s { + float f1; +}; + +struct child6a_s : parent6_float_s { +}; + +struct child6b_s : parent6_float_s { +}; + +struct grandchild_6_s : child6a_s, child6b_s { +}; + +// ILP32: define{{.*}} [2 x i32] @_Z38float_float_diamond_struct_inheritance14grandchild_6_s([2 x i32] %a.coerce) +// ILP32F-ILP64D: define{{.*}} { float, float } @_Z38float_float_diamond_struct_inheritance14grandchild_6_s(float %0, float %1) +// LP64: define{{.*}} i64 @_Z38float_float_diamond_struct_inheritance14grandchild_6_s(i64 %a.coerce) +// LP64F-LP64D: define{{.*}} { float, float } @_Z38float_float_diamond_struct_inheritance14grandchild_6_s(float %0, float %1) +struct grandchild_6_s float_float_diamond_struct_inheritance(struct grandchild_6_s a) { + return a; +} + // NOTE: These prefixes are unused. Do not add tests below this line: // ILP32F: {{.*}} // LP64F: {{.*}} |