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| author | Craig Topper <craig.topper@sifive.com> | 2024-05-21 13:07:56 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-21 13:07:56 -0700 |
| commit | 687039bce91e90f87d68fb0c409baffaae16649e (patch) | |
| tree | b3ff154c7c1921e8c08ca3a553422fad7dddcc94 | |
| parent | 0bc710f7c19910817ccff254c43496602635bbc9 (diff) | |
| download | llvm-687039bce91e90f87d68fb0c409baffaae16649e.zip llvm-687039bce91e90f87d68fb0c409baffaae16649e.tar.gz llvm-687039bce91e90f87d68fb0c409baffaae16649e.tar.bz2 | |
[X86] Return true for opaque constants in hasAndNotCompare. (#92944)
This is the X86 equivalent of #92926
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/pr90703.ll | 21 |
2 files changed, 22 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5d08464..24ee0c4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -3292,7 +3292,7 @@ bool X86TargetLowering::hasAndNotCompare(SDValue Y) const { if (VT != MVT::i32 && VT != MVT::i64) return false; - return !isa<ConstantSDNode>(Y); + return !isa<ConstantSDNode>(Y) || cast<ConstantSDNode>(Y)->isOpaque(); } bool X86TargetLowering::hasAndNot(SDValue Y) const { diff --git a/llvm/test/CodeGen/X86/pr90703.ll b/llvm/test/CodeGen/X86/pr90703.ll new file mode 100644 index 0000000..c02342f --- /dev/null +++ b/llvm/test/CodeGen/X86/pr90703.ll @@ -0,0 +1,21 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi | FileCheck %s + +define i64 @pr90730(i64 %x, i64 %y, ptr %p) { +; CHECK-LABEL: pr90730: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movabsq $33181731808, %rax # imm = 0x7B9C90BE0 +; CHECK-NEXT: andnq %rax, %rdi, %rax +; CHECK-NEXT: movq $0, (%rdx) +; CHECK-NEXT: retq +entry: + %ext = and i64 %y, 1 + %xor1 = xor i64 %ext, 33181731817 + %and1 = and i64 %xor1, %x + store i64 %and1, ptr %p, align 4 + %v = load i64, ptr %p, align 4 + %and2 = and i64 %v, 33181731808 + %xor2 = xor i64 %and2, 33181731808 + store i64 0, ptr %p, align 4 + ret i64 %xor2 +} |