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| author | Craig Topper <craig.topper@sifive.com> | 2024-03-05 20:59:07 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-05 20:59:07 -0800 |
| commit | 5fb331106dbcfba21f82b2a84c22a65ee9d4d014 (patch) | |
| tree | 333f06baec61f5b49ede8534be283cfdd795e13d | |
| parent | 7bad74e66756ca2fd1fe4f5864e7123fb4553d78 (diff) | |
| download | llvm-5fb331106dbcfba21f82b2a84c22a65ee9d4d014.zip llvm-5fb331106dbcfba21f82b2a84c22a65ee9d4d014.tar.gz llvm-5fb331106dbcfba21f82b2a84c22a65ee9d4d014.tar.bz2 | |
[RISCV] Use uint32_t for NumOfVReg in getVLENFactoredAmount. (#84110)
The rest of the code pretty much assumed this anyway.
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp index 2abe015..ef0d7cb 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp @@ -3059,11 +3059,11 @@ void RISCVInstrInfo::getVLENFactoredAmount(MachineFunction &MF, "Reserve the stack by the multiple of one vector size."); MachineRegisterInfo &MRI = MF.getRegInfo(); - int64_t NumOfVReg = Amount / 8; + assert(isInt<32>(Amount / 8) && + "Expect the number of vector registers within 32-bits."); + uint32_t NumOfVReg = Amount / 8; BuildMI(MBB, II, DL, get(RISCV::PseudoReadVLENB), DestReg).setMIFlag(Flag); - assert(isInt<32>(NumOfVReg) && - "Expect the number of vector registers within 32-bits."); if (llvm::has_single_bit<uint32_t>(NumOfVReg)) { uint32_t ShiftAmount = Log2_32(NumOfVReg); if (ShiftAmount == 0) @@ -3137,7 +3137,7 @@ void RISCVInstrInfo::getVLENFactoredAmount(MachineFunction &MF, .setMIFlag(Flag); uint32_t PrevShiftAmount = 0; for (uint32_t ShiftAmount = 0; NumOfVReg >> ShiftAmount; ShiftAmount++) { - if (NumOfVReg & (1LL << ShiftAmount)) { + if (NumOfVReg & (1U << ShiftAmount)) { if (ShiftAmount) BuildMI(MBB, II, DL, get(RISCV::SLLI), DestReg) .addReg(DestReg, RegState::Kill) |