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author | Vitaly Buka <vitalybuka@google.com> | 2023-12-12 19:47:41 -0800 |
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committer | Vitaly Buka <vitalybuka@google.com> | 2023-12-12 19:47:41 -0800 |
commit | 22a1725ad0dc6308fc2459d6aaf5cf6da5df690a (patch) | |
tree | ad69d3d23640d963cdaf27e85d0c25150084611d | |
parent | bbd66c667a4836db5201c42ec39bc822c8fe10c4 (diff) | |
parent | 53ecd3a2a5eb87975c85bfb5ccd3720b45b87a21 (diff) | |
download | llvm-users/vitalybuka/spr/main.testsanitizer-allow-fork_threaded-test-on-msan-tsan.zip llvm-users/vitalybuka/spr/main.testsanitizer-allow-fork_threaded-test-on-msan-tsan.tar.gz llvm-users/vitalybuka/spr/main.testsanitizer-allow-fork_threaded-test-on-msan-tsan.tar.bz2 |
[𝘀𝗽𝗿] changes introduced through rebaseusers/vitalybuka/spr/main.testsanitizer-allow-fork_threaded-test-on-msan-tsan
Created using spr 1.3.4
[skip ci]
-rw-r--r-- | clang/lib/Sema/SemaRISCVVectorLookup.cpp | 10 | ||||
-rw-r--r-- | llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn | 1 |
2 files changed, 6 insertions, 5 deletions
diff --git a/clang/lib/Sema/SemaRISCVVectorLookup.cpp b/clang/lib/Sema/SemaRISCVVectorLookup.cpp index 0d411fc..e4642e4 100644 --- a/clang/lib/Sema/SemaRISCVVectorLookup.cpp +++ b/clang/lib/Sema/SemaRISCVVectorLookup.cpp @@ -43,7 +43,7 @@ struct RVVIntrinsicDef { struct RVVOverloadIntrinsicDef { // Indexes of RISCVIntrinsicManagerImpl::IntrinsicList. - SmallVector<size_t, 8> Indexes; + SmallVector<uint32_t, 8> Indexes; }; } // namespace @@ -162,7 +162,7 @@ private: // List of all RVV intrinsic. std::vector<RVVIntrinsicDef> IntrinsicList; // Mapping function name to index of IntrinsicList. - StringMap<size_t> Intrinsics; + StringMap<uint32_t> Intrinsics; // Mapping function name to RVVOverloadIntrinsicDef. StringMap<RVVOverloadIntrinsicDef> OverloadIntrinsics; @@ -174,7 +174,7 @@ private: // Create FunctionDecl for a vector intrinsic. void CreateRVVIntrinsicDecl(LookupResult &LR, IdentifierInfo *II, - Preprocessor &PP, unsigned Index, + Preprocessor &PP, uint32_t Index, bool IsOverload); void ConstructRVVIntrinsics(ArrayRef<RVVIntrinsicRecord> Recs, @@ -386,7 +386,7 @@ void RISCVIntrinsicManagerImpl::InitRVVIntrinsic( Record.HasFRMRoundModeOp); // Put into IntrinsicList. - size_t Index = IntrinsicList.size(); + uint32_t Index = IntrinsicList.size(); IntrinsicList.push_back({BuiltinName, Signature}); // Creating mapping to Intrinsics. @@ -403,7 +403,7 @@ void RISCVIntrinsicManagerImpl::InitRVVIntrinsic( void RISCVIntrinsicManagerImpl::CreateRVVIntrinsicDecl(LookupResult &LR, IdentifierInfo *II, Preprocessor &PP, - unsigned Index, + uint32_t Index, bool IsOverload) { ASTContext &Context = S.Context; RVVIntrinsicDef &IDef = IntrinsicList[Index]; diff --git a/llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn index d984201..5cd9673 100644 --- a/llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn @@ -8,6 +8,7 @@ static_library("Passes") { "//llvm/lib/Support", "//llvm/lib/Target", "//llvm/lib/Transforms/AggressiveInstCombine", + "//llvm/lib/Transforms/CFGuard", "//llvm/lib/Transforms/Coroutines", "//llvm/lib/Transforms/HipStdPar", "//llvm/lib/Transforms/IPO", |