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author | Nikita Popov <npopov@redhat.com> | 2024-01-08 15:49:47 +0100 |
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committer | Nikita Popov <npopov@redhat.com> | 2024-01-08 15:52:58 +0100 |
commit | 97e3220d6312ae00bcbe08673f218bd0f705776b (patch) | |
tree | a7389cb44c0c003a36104b720b8113616c16caca | |
parent | ade7ae4760a0b0e74cddd8f852830ca946295930 (diff) | |
download | llvm-97e3220d6312ae00bcbe08673f218bd0f705776b.zip llvm-97e3220d6312ae00bcbe08673f218bd0f705776b.tar.gz llvm-97e3220d6312ae00bcbe08673f218bd0f705776b.tar.bz2 |
[InstSimplify] Consider bitcast as potential cross-lane operation
The bitcast might change the number of vector lanes, in which case
it will be a cross-lane operation.
Fixes https://github.com/llvm/llvm-project/issues/77320.
-rw-r--r-- | llvm/lib/Analysis/InstructionSimplify.cpp | 2 | ||||
-rw-r--r-- | llvm/test/Transforms/InstSimplify/select.ll | 9 |
2 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Analysis/InstructionSimplify.cpp b/llvm/lib/Analysis/InstructionSimplify.cpp index 241bdd8..d0c27ca 100644 --- a/llvm/lib/Analysis/InstructionSimplify.cpp +++ b/llvm/lib/Analysis/InstructionSimplify.cpp @@ -4313,7 +4313,7 @@ static Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp, // For vector types, the simplification must hold per-lane, so forbid // potentially cross-lane operations like shufflevector. if (!I->getType()->isVectorTy() || isa<ShuffleVectorInst>(I) || - isa<CallBase>(I)) + isa<CallBase>(I) || isa<BitCastInst>(I)) return nullptr; } diff --git a/llvm/test/Transforms/InstSimplify/select.ll b/llvm/test/Transforms/InstSimplify/select.ll index 899179e1..fe93a0c 100644 --- a/llvm/test/Transforms/InstSimplify/select.ll +++ b/llvm/test/Transforms/InstSimplify/select.ll @@ -1734,10 +1734,15 @@ define i8 @select_or_disjoint_eq(i8 %x, i8 %y) { ret i8 %sel } -; FIXME: This is a miscompile. define <4 x i32> @select_vector_cmp_with_bitcasts(<2 x i64> %x, <4 x i32> %y) { ; CHECK-LABEL: @select_vector_cmp_with_bitcasts( -; CHECK-NEXT: ret <4 x i32> zeroinitializer +; CHECK-NEXT: [[X_BC:%.*]] = bitcast <2 x i64> [[X:%.*]] to <4 x i32> +; CHECK-NEXT: [[Y_BC:%.*]] = bitcast <4 x i32> [[Y:%.*]] to <2 x i64> +; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i64> [[X]], [[Y_BC]] +; CHECK-NEXT: [[SUB_BC:%.*]] = bitcast <2 x i64> [[SUB]] to <4 x i32> +; CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[Y]], [[X_BC]] +; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[SUB_BC]], <4 x i32> zeroinitializer +; CHECK-NEXT: ret <4 x i32> [[SEL]] ; %x.bc = bitcast <2 x i64> %x to <4 x i32> %y.bc = bitcast <4 x i32> %y to <2 x i64> |