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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2024-01-08 12:59:00 +0000 |
---|---|---|
committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2024-01-08 17:25:44 +0000 |
commit | 9632f987161b4efeb8c087f19a3eb4f7c69cc920 (patch) | |
tree | 04270eb679f1751ca2d7a80cc71589992e41d9a7 | |
parent | 635f6d384596950e73b2485842c587a2954c655f (diff) | |
download | llvm-9632f987161b4efeb8c087f19a3eb4f7c69cc920.zip llvm-9632f987161b4efeb8c087f19a3eb4f7c69cc920.tar.gz llvm-9632f987161b4efeb8c087f19a3eb4f7c69cc920.tar.bz2 |
[X86] legalize-shl-vec.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
-rw-r--r-- | llvm/test/CodeGen/X86/legalize-shl-vec.ll | 332 |
1 files changed, 152 insertions, 180 deletions
diff --git a/llvm/test/CodeGen/X86/legalize-shl-vec.ll b/llvm/test/CodeGen/X86/legalize-shl-vec.ll index cf42322..5e168a8 100644 --- a/llvm/test/CodeGen/X86/legalize-shl-vec.ll +++ b/llvm/test/CodeGen/X86/legalize-shl-vec.ll @@ -1,46 +1,46 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64 -define <2 x i256> @test_shl(<2 x i256> %In) { -; X32-LABEL: test_shl: -; X32: # %bb.0: -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: shldl $2, %ecx, %edx -; X32-NEXT: movl %edx, 60(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: shldl $2, %edx, %ecx -; X32-NEXT: movl %ecx, 56(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shldl $2, %ecx, %edx -; X32-NEXT: movl %edx, 52(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: shldl $2, %edx, %ecx -; X32-NEXT: movl %ecx, 48(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shldl $2, %ecx, %edx -; X32-NEXT: movl %edx, 44(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: shldl $2, %edx, %ecx -; X32-NEXT: movl %ecx, 40(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shldl $2, %ecx, %edx -; X32-NEXT: movl %edx, 36(%eax) -; X32-NEXT: shll $2, %ecx -; X32-NEXT: movl %ecx, 32(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shll $31, %ecx -; X32-NEXT: movl %ecx, 28(%eax) -; X32-NEXT: movl $0, 24(%eax) -; X32-NEXT: movl $0, 20(%eax) -; X32-NEXT: movl $0, 16(%eax) -; X32-NEXT: movl $0, 12(%eax) -; X32-NEXT: movl $0, 8(%eax) -; X32-NEXT: movl $0, 4(%eax) -; X32-NEXT: movl $0, (%eax) -; X32-NEXT: retl $4 +define <2 x i256> @test_shl(<2 x i256> %In) nounwind { +; X86-LABEL: test_shl: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: shldl $2, %ecx, %edx +; X86-NEXT: movl %edx, 60(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: shldl $2, %edx, %ecx +; X86-NEXT: movl %ecx, 56(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shldl $2, %ecx, %edx +; X86-NEXT: movl %edx, 52(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: shldl $2, %edx, %ecx +; X86-NEXT: movl %ecx, 48(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shldl $2, %ecx, %edx +; X86-NEXT: movl %edx, 44(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: shldl $2, %edx, %ecx +; X86-NEXT: movl %ecx, 40(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shldl $2, %ecx, %edx +; X86-NEXT: movl %edx, 36(%eax) +; X86-NEXT: shll $2, %ecx +; X86-NEXT: movl %ecx, 32(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shll $31, %ecx +; X86-NEXT: movl %ecx, 28(%eax) +; X86-NEXT: movl $0, 24(%eax) +; X86-NEXT: movl $0, 20(%eax) +; X86-NEXT: movl $0, 16(%eax) +; X86-NEXT: movl $0, 12(%eax) +; X86-NEXT: movl $0, 8(%eax) +; X86-NEXT: movl $0, 4(%eax) +; X86-NEXT: movl $0, (%eax) +; X86-NEXT: retl $4 ; ; X64-LABEL: test_shl: ; X64: # %bb.0: @@ -67,76 +67,62 @@ define <2 x i256> @test_shl(<2 x i256> %In) { ret <2 x i256> %Out } -define <2 x i256> @test_srl(<2 x i256> %In) { -; X32-LABEL: test_srl: -; X32: # %bb.0: -; X32-NEXT: pushl %ebp -; X32-NEXT: .cfi_def_cfa_offset 8 -; X32-NEXT: pushl %ebx -; X32-NEXT: .cfi_def_cfa_offset 12 -; X32-NEXT: pushl %edi -; X32-NEXT: .cfi_def_cfa_offset 16 -; X32-NEXT: pushl %esi -; X32-NEXT: .cfi_def_cfa_offset 20 -; X32-NEXT: subl $8, %esp -; X32-NEXT: .cfi_def_cfa_offset 28 -; X32-NEXT: .cfi_offset %esi, -20 -; X32-NEXT: .cfi_offset %edi, -16 -; X32-NEXT: .cfi_offset %ebx, -12 -; X32-NEXT: .cfi_offset %ebp, -8 -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %edi -; X32-NEXT: movl %ebp, %esi -; X32-NEXT: shldl $28, %edx, %esi -; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: shldl $28, %ebx, %edx -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: shldl $28, %ecx, %ebx -; X32-NEXT: movl %ecx, %esi -; X32-NEXT: shldl $28, %edi, %esi -; X32-NEXT: shldl $28, %eax, %edi -; X32-NEXT: movl %eax, %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: shldl $28, %eax, %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shrdl $4, %eax, %ecx -; X32-NEXT: shrl $4, %ebp -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl %ebp, 60(%eax) -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload -; X32-NEXT: movl %ebp, 56(%eax) -; X32-NEXT: movl (%esp), %ebp # 4-byte Reload -; X32-NEXT: movl %ebp, 52(%eax) -; X32-NEXT: movl %ebx, 48(%eax) -; X32-NEXT: movl %esi, 44(%eax) -; X32-NEXT: movl %edi, 40(%eax) -; X32-NEXT: movl %edx, 36(%eax) -; X32-NEXT: movl %ecx, 32(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shrl $31, %ecx -; X32-NEXT: movl %ecx, (%eax) -; X32-NEXT: movl $0, 28(%eax) -; X32-NEXT: movl $0, 24(%eax) -; X32-NEXT: movl $0, 20(%eax) -; X32-NEXT: movl $0, 16(%eax) -; X32-NEXT: movl $0, 12(%eax) -; X32-NEXT: movl $0, 8(%eax) -; X32-NEXT: movl $0, 4(%eax) -; X32-NEXT: addl $8, %esp -; X32-NEXT: .cfi_def_cfa_offset 20 -; X32-NEXT: popl %esi -; X32-NEXT: .cfi_def_cfa_offset 16 -; X32-NEXT: popl %edi -; X32-NEXT: .cfi_def_cfa_offset 12 -; X32-NEXT: popl %ebx -; X32-NEXT: .cfi_def_cfa_offset 8 -; X32-NEXT: popl %ebp -; X32-NEXT: .cfi_def_cfa_offset 4 -; X32-NEXT: retl $4 +define <2 x i256> @test_srl(<2 x i256> %In) nounwind { +; X86-LABEL: test_srl: +; X86: # %bb.0: +; X86-NEXT: pushl %ebp +; X86-NEXT: pushl %ebx +; X86-NEXT: pushl %edi +; X86-NEXT: pushl %esi +; X86-NEXT: subl $8, %esp +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %edi +; X86-NEXT: movl %ebp, %esi +; X86-NEXT: shldl $28, %edx, %esi +; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X86-NEXT: shldl $28, %ebx, %edx +; X86-NEXT: movl %edx, (%esp) # 4-byte Spill +; X86-NEXT: shldl $28, %ecx, %ebx +; X86-NEXT: movl %ecx, %esi +; X86-NEXT: shldl $28, %edi, %esi +; X86-NEXT: shldl $28, %eax, %edi +; X86-NEXT: movl %eax, %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: shldl $28, %eax, %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shrdl $4, %eax, %ecx +; X86-NEXT: shrl $4, %ebp +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl %ebp, 60(%eax) +; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload +; X86-NEXT: movl %ebp, 56(%eax) +; X86-NEXT: movl (%esp), %ebp # 4-byte Reload +; X86-NEXT: movl %ebp, 52(%eax) +; X86-NEXT: movl %ebx, 48(%eax) +; X86-NEXT: movl %esi, 44(%eax) +; X86-NEXT: movl %edi, 40(%eax) +; X86-NEXT: movl %edx, 36(%eax) +; X86-NEXT: movl %ecx, 32(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shrl $31, %ecx +; X86-NEXT: movl %ecx, (%eax) +; X86-NEXT: movl $0, 28(%eax) +; X86-NEXT: movl $0, 24(%eax) +; X86-NEXT: movl $0, 20(%eax) +; X86-NEXT: movl $0, 16(%eax) +; X86-NEXT: movl $0, 12(%eax) +; X86-NEXT: movl $0, 8(%eax) +; X86-NEXT: movl $0, 4(%eax) +; X86-NEXT: addl $8, %esp +; X86-NEXT: popl %esi +; X86-NEXT: popl %edi +; X86-NEXT: popl %ebx +; X86-NEXT: popl %ebp +; X86-NEXT: retl $4 ; ; X64-LABEL: test_srl: ; X64: # %bb.0: @@ -163,76 +149,62 @@ define <2 x i256> @test_srl(<2 x i256> %In) { ret <2 x i256> %Out } -define <2 x i256> @test_sra(<2 x i256> %In) { -; X32-LABEL: test_sra: -; X32: # %bb.0: -; X32-NEXT: pushl %ebp -; X32-NEXT: .cfi_def_cfa_offset 8 -; X32-NEXT: pushl %ebx -; X32-NEXT: .cfi_def_cfa_offset 12 -; X32-NEXT: pushl %edi -; X32-NEXT: .cfi_def_cfa_offset 16 -; X32-NEXT: pushl %esi -; X32-NEXT: .cfi_def_cfa_offset 20 -; X32-NEXT: subl $8, %esp -; X32-NEXT: .cfi_def_cfa_offset 28 -; X32-NEXT: .cfi_offset %esi, -20 -; X32-NEXT: .cfi_offset %edi, -16 -; X32-NEXT: .cfi_offset %ebx, -12 -; X32-NEXT: .cfi_offset %ebp, -8 -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %edi -; X32-NEXT: movl %ebp, %esi -; X32-NEXT: shldl $26, %edx, %esi -; X32-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; X32-NEXT: shldl $26, %ebx, %edx -; X32-NEXT: movl %edx, (%esp) # 4-byte Spill -; X32-NEXT: shldl $26, %ecx, %ebx -; X32-NEXT: movl %ecx, %esi -; X32-NEXT: shldl $26, %edi, %esi -; X32-NEXT: shldl $26, %eax, %edi -; X32-NEXT: movl %eax, %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: shldl $26, %eax, %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: shrdl $6, %eax, %ecx -; X32-NEXT: sarl $6, %ebp -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl %ebp, 60(%eax) -; X32-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload -; X32-NEXT: movl %ebp, 56(%eax) -; X32-NEXT: movl (%esp), %ebp # 4-byte Reload -; X32-NEXT: movl %ebp, 52(%eax) -; X32-NEXT: movl %ebx, 48(%eax) -; X32-NEXT: movl %esi, 44(%eax) -; X32-NEXT: movl %edi, 40(%eax) -; X32-NEXT: movl %edx, 36(%eax) -; X32-NEXT: movl %ecx, 32(%eax) -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: sarl $31, %ecx -; X32-NEXT: movl %ecx, 28(%eax) -; X32-NEXT: movl %ecx, 24(%eax) -; X32-NEXT: movl %ecx, 20(%eax) -; X32-NEXT: movl %ecx, 16(%eax) -; X32-NEXT: movl %ecx, 12(%eax) -; X32-NEXT: movl %ecx, 8(%eax) -; X32-NEXT: movl %ecx, 4(%eax) -; X32-NEXT: movl %ecx, (%eax) -; X32-NEXT: addl $8, %esp -; X32-NEXT: .cfi_def_cfa_offset 20 -; X32-NEXT: popl %esi -; X32-NEXT: .cfi_def_cfa_offset 16 -; X32-NEXT: popl %edi -; X32-NEXT: .cfi_def_cfa_offset 12 -; X32-NEXT: popl %ebx -; X32-NEXT: .cfi_def_cfa_offset 8 -; X32-NEXT: popl %ebp -; X32-NEXT: .cfi_def_cfa_offset 4 -; X32-NEXT: retl $4 +define <2 x i256> @test_sra(<2 x i256> %In) nounwind { +; X86-LABEL: test_sra: +; X86: # %bb.0: +; X86-NEXT: pushl %ebp +; X86-NEXT: pushl %ebx +; X86-NEXT: pushl %edi +; X86-NEXT: pushl %esi +; X86-NEXT: subl $8, %esp +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebp +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %edi +; X86-NEXT: movl %ebp, %esi +; X86-NEXT: shldl $26, %edx, %esi +; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; X86-NEXT: shldl $26, %ebx, %edx +; X86-NEXT: movl %edx, (%esp) # 4-byte Spill +; X86-NEXT: shldl $26, %ecx, %ebx +; X86-NEXT: movl %ecx, %esi +; X86-NEXT: shldl $26, %edi, %esi +; X86-NEXT: shldl $26, %eax, %edi +; X86-NEXT: movl %eax, %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: shldl $26, %eax, %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: shrdl $6, %eax, %ecx +; X86-NEXT: sarl $6, %ebp +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl %ebp, 60(%eax) +; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebp # 4-byte Reload +; X86-NEXT: movl %ebp, 56(%eax) +; X86-NEXT: movl (%esp), %ebp # 4-byte Reload +; X86-NEXT: movl %ebp, 52(%eax) +; X86-NEXT: movl %ebx, 48(%eax) +; X86-NEXT: movl %esi, 44(%eax) +; X86-NEXT: movl %edi, 40(%eax) +; X86-NEXT: movl %edx, 36(%eax) +; X86-NEXT: movl %ecx, 32(%eax) +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: sarl $31, %ecx +; X86-NEXT: movl %ecx, 28(%eax) +; X86-NEXT: movl %ecx, 24(%eax) +; X86-NEXT: movl %ecx, 20(%eax) +; X86-NEXT: movl %ecx, 16(%eax) +; X86-NEXT: movl %ecx, 12(%eax) +; X86-NEXT: movl %ecx, 8(%eax) +; X86-NEXT: movl %ecx, 4(%eax) +; X86-NEXT: movl %ecx, (%eax) +; X86-NEXT: addl $8, %esp +; X86-NEXT: popl %esi +; X86-NEXT: popl %edi +; X86-NEXT: popl %ebx +; X86-NEXT: popl %ebp +; X86-NEXT: retl $4 ; ; X64-LABEL: test_sra: ; X64: # %bb.0: |