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author | Scott Linder <Scott.Linder@amd.com> | 2023-11-08 21:05:40 +0000 |
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committer | Scott Linder <Scott.Linder@amd.com> | 2023-11-08 21:05:40 +0000 |
commit | f1931b6c3d9a46f582c4c32e4b328001796fac69 (patch) | |
tree | 61316d69cdcb1207f915e87705c716b627af0dd1 | |
parent | ef6d187115a28c745108f2b26a5d5a62cedf9b3c (diff) | |
download | llvm-users/slinder1/sprmain.nfcasmprinter-clarify-handlenewdebugvalue-cache-of-trackedregs.zip llvm-users/slinder1/sprmain.nfcasmprinter-clarify-handlenewdebugvalue-cache-of-trackedregs.tar.gz llvm-users/slinder1/sprmain.nfcasmprinter-clarify-handlenewdebugvalue-cache-of-trackedregs.tar.bz2 |
[𝘀𝗽𝗿] changes to main this commit is based onusers/slinder1/sprmain.nfcasmprinter-clarify-handlenewdebugvalue-cache-of-trackedregs
Created using spr 1.3.6-beta.1
[skip ci]
-rw-r--r-- | llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp index 55a0afc..dab27d2 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp @@ -466,9 +466,6 @@ void llvm::calculateDbgEntityHistory(const MachineFunction *MF, for (const auto &MI : MBB) { if (MI.isDebugValue()) { assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!"); - // Use the base variable (without any DW_OP_piece expressions) - // as index into History. The full variables including the - // piece expressions are attached to the MI. const DILocalVariable *RawVar = MI.getDebugVariable(); assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) && "Expected inlined-at fields to agree"); @@ -492,8 +489,7 @@ void llvm::calculateDbgEntityHistory(const MachineFunction *MF, if (MI.isMetaInstruction()) continue; - // Not a DBG_VALUE instruction. It may clobber registers which describe - // some variables. + // Other instruction may clobber registers which describe some variables. for (const MachineOperand &MO : MI.operands()) { if (MO.isReg() && MO.isDef() && MO.getReg()) { // Ignore call instructions that claim to clobber SP. The AArch64 |