diff options
author | Philip Reames <preames@rivosinc.com> | 2024-01-23 09:22:29 -0800 |
---|---|---|
committer | Philip Reames <listmail@philipreames.com> | 2024-01-23 09:32:04 -0800 |
commit | a0f69be26293dfb3b6c65ca65bd68f735f60c5a3 (patch) | |
tree | 690599038e0a962c2fb7e8be36dd849b339989dd | |
parent | c5a33befcc328339a84c35f6899ff3f3309399fc (diff) | |
download | llvm-a0f69be26293dfb3b6c65ca65bd68f735f60c5a3.zip llvm-a0f69be26293dfb3b6c65ca65bd68f735f60c5a3.tar.gz llvm-a0f69be26293dfb3b6c65ca65bd68f735f60c5a3.tar.bz2 |
[RISCV] Continue with early return for shuffle lowering [nfc]
Move two cases where we're not actually going to use any of our computed index vectors or mask values above the computation of the same.
-rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index ff730cd..2fd4479 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -4875,6 +4875,19 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG, return DAG.getNode(ISD::VSELECT, DL, VT, SelectMask, V1, V2); } + // We might be able to express the shuffle as a bitrotate. But even if we + // don't have Zvkb and have to expand, the expanded sequence of approx. 2 + // shifts and a vor will have a higher throughput than a vrgather. + if (SDValue V = lowerVECTOR_SHUFFLEAsRotate(SVN, DAG, Subtarget)) + return V; + + if (VT.getScalarSizeInBits() == 8 && VT.getVectorNumElements() > 256) { + // On such a large vector we're unable to use i8 as the index type. + // FIXME: We could promote the index to i16 and use vrgatherei16, but that + // may involve vector splitting if we're already at LMUL=8, or our + // user-supplied maximum fixed-length LMUL. + return SDValue(); + } // As a backup, shuffles can be lowered via a vrgather instruction, possibly // merged with a second vrgather. @@ -4913,20 +4926,6 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG, MVT MaskVT = MVT::getVectorVT(MVT::i1, NumElts); SDValue SelectMask = DAG.getBuildVector(MaskVT, DL, MaskVals); - // We might be able to express the shuffle as a bitrotate. But even if we - // don't have Zvkb and have to expand, the expanded sequence of approx. 2 - // shifts and a vor will have a higher throughput than a vrgather. - if (SDValue V = lowerVECTOR_SHUFFLEAsRotate(SVN, DAG, Subtarget)) - return V; - - if (VT.getScalarSizeInBits() == 8 && VT.getVectorNumElements() > 256) { - // On such a large vector we're unable to use i8 as the index type. - // FIXME: We could promote the index to i16 and use vrgatherei16, but that - // may involve vector splitting if we're already at LMUL=8, or our - // user-supplied maximum fixed-length LMUL. - return SDValue(); - } - unsigned GatherVXOpc = RISCVISD::VRGATHER_VX_VL; unsigned GatherVVOpc = RISCVISD::VRGATHER_VV_VL; MVT IndexVT = VT.changeTypeToInteger(); |