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authorMichael Maitland <michaeltmaitland@gmail.com>2024-04-01 09:35:42 -0400
committerGitHub <noreply@github.com>2024-04-01 09:35:42 -0400
commita7206a6fa32ada15578e3afddcc1480364c25f4c (patch)
tree1bf366033ddc1ee253daed317844b8433f656fc6
parent41afef9066eec8daf517ac357a628cdf30c95e39 (diff)
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[RISCV] ReadStoreData is read later in the pipeline for SiFive7 (#86454)
Store data is read later in the pipeline, so we use SiFive7AnyToGPRBypass to model that a store instruction can begin some cycles before that data is ready.
-rw-r--r--llvm/lib/Target/RISCV/RISCVSchedSiFive7.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td b/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
index 3586d23..54a1388 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
@@ -950,7 +950,7 @@ def : InstRW<[WriteIALU], (instrs COPY)>;
def : SiFive7AnyToGPRBypass<ReadJmp>;
def : SiFive7AnyToGPRBypass<ReadJalr>;
def : ReadAdvance<ReadCSR, 0>;
-def : ReadAdvance<ReadStoreData, 0>;
+def : SiFive7AnyToGPRBypass<ReadStoreData>;
def : ReadAdvance<ReadMemBase, 0>;
def : SiFive7AnyToGPRBypass<ReadIALU>;
def : SiFive7AnyToGPRBypass<ReadIALU32>;