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author | Jay Foad <jay.foad@amd.com> | 2024-02-13 14:31:54 +0000 |
---|---|---|
committer | GitHub <noreply@github.com> | 2024-02-13 14:31:54 +0000 |
commit | f7cddf80062848fbbb358d7e913650cc550d2547 (patch) | |
tree | 37532dde9fe661141c0d1f3f95c7ad5729459da8 | |
parent | d759618df76361a8e490eeae5c5399e0738cbfd0 (diff) | |
download | llvm-f7cddf80062848fbbb358d7e913650cc550d2547.zip llvm-f7cddf80062848fbbb358d7e913650cc550d2547.tar.gz llvm-f7cddf80062848fbbb358d7e913650cc550d2547.tar.bz2 |
[TableGen] Use std::move instead of swap. NFC. (#81606)
Historically TableGen has used `A.swap(B)` to move containers without
the expense of copying them. Perhaps this predated rvalue references. In
any case `A = std::move(B)` seems like a more direct way to implement
this when only A is required after the operation.
-rw-r--r-- | llvm/utils/TableGen/AsmMatcherEmitter.cpp | 9 | ||||
-rw-r--r-- | llvm/utils/TableGen/CodeGenRegisters.cpp | 6 | ||||
-rw-r--r-- | llvm/utils/TableGen/CodeGenSchedule.cpp | 2 | ||||
-rw-r--r-- | llvm/utils/TableGen/GlobalISelMatchTable.cpp | 4 | ||||
-rw-r--r-- | llvm/utils/TableGen/SubtargetEmitter.cpp | 2 |
5 files changed, 11 insertions, 12 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp index a212265..d6dc4b7 100644 --- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp +++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp @@ -1269,11 +1269,10 @@ void AsmMatcherInfo::buildRegisterClasses( } RegisterSet Tmp; - std::swap(Tmp, ContainingSet); - std::insert_iterator<RegisterSet> II(ContainingSet, - ContainingSet.begin()); - std::set_intersection(Tmp.begin(), Tmp.end(), RS.begin(), RS.end(), II, - LessRecordByID()); + std::insert_iterator<RegisterSet> II(Tmp, Tmp.begin()); + std::set_intersection(ContainingSet.begin(), ContainingSet.end(), + RS.begin(), RS.end(), II, LessRecordByID()); + ContainingSet = std::move(Tmp); } if (!ContainingSet.empty()) { diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp index 5c74a6f..25ef310 100644 --- a/llvm/utils/TableGen/CodeGenRegisters.cpp +++ b/llvm/utils/TableGen/CodeGenRegisters.cpp @@ -1964,9 +1964,9 @@ void CodeGenRegBank::pruneUnitSets() { for (unsigned i = 0, e = SuperSetIDs.size(); i != e; ++i) { unsigned SuperIdx = SuperSetIDs[i]; PrunedUnitSets[i].Name = RegUnitSets[SuperIdx].Name; - PrunedUnitSets[i].Units.swap(RegUnitSets[SuperIdx].Units); + PrunedUnitSets[i].Units = std::move(RegUnitSets[SuperIdx].Units); } - RegUnitSets.swap(PrunedUnitSets); + RegUnitSets = std::move(PrunedUnitSets); } // Create a RegUnitSet for each RegClass that contains all units in the class @@ -2139,7 +2139,7 @@ void CodeGenRegBank::computeRegUnitSets() { if (RCUnitSetsIdx == RegClassUnitSets.size()) { // Create a new list of UnitSets as a "fake" register class. RegClassUnitSets.resize(RCUnitSetsIdx + 1); - RegClassUnitSets[RCUnitSetsIdx].swap(RUSets); + RegClassUnitSets[RCUnitSetsIdx] = std::move(RUSets); } } } diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp index 9cebc42..e56bf5b 100644 --- a/llvm/utils/TableGen/CodeGenSchedule.cpp +++ b/llvm/utils/TableGen/CodeGenSchedule.cpp @@ -1788,7 +1788,7 @@ void CodeGenSchedModels::inferFromRW(ArrayRef<unsigned> OperWrites, for (const PredTransition &Trans : LastTransitions) SubstitutedAny |= Transitions.substituteVariants(Trans); LLVM_DEBUG(Transitions.dump()); - LastTransitions.swap(Transitions.TransVec); + LastTransitions = std::move(Transitions.TransVec); } while (SubstitutedAny); // WARNING: We are about to mutate the SchedClasses vector. Do not refer to diff --git a/llvm/utils/TableGen/GlobalISelMatchTable.cpp b/llvm/utils/TableGen/GlobalISelMatchTable.cpp index f7166ea..d1bdc30 100644 --- a/llvm/utils/TableGen/GlobalISelMatchTable.cpp +++ b/llvm/utils/TableGen/GlobalISelMatchTable.cpp @@ -545,8 +545,8 @@ void GroupMatcher::optimize() { if (T != E) F = ++T; } - optimizeRules<GroupMatcher>(Matchers, MatcherStorage).swap(Matchers); - optimizeRules<SwitchMatcher>(Matchers, MatcherStorage).swap(Matchers); + Matchers = optimizeRules<GroupMatcher>(Matchers, MatcherStorage); + Matchers = optimizeRules<SwitchMatcher>(Matchers, MatcherStorage); } //===- SwitchMatcher ------------------------------------------------------===// diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp index b1502ea..ebe3916 100644 --- a/llvm/utils/TableGen/SubtargetEmitter.cpp +++ b/llvm/utils/TableGen/SubtargetEmitter.cpp @@ -1649,7 +1649,7 @@ static void collectProcessorIndices(const CodeGenSchedClass &SC, IdxVec PI; std::set_union(&T.ProcIndex, &T.ProcIndex + 1, ProcIndices.begin(), ProcIndices.end(), std::back_inserter(PI)); - ProcIndices.swap(PI); + ProcIndices = std::move(PI); } } |