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author | Craig Topper <craig.topper@sifive.com> | 2024-04-03 18:48:30 -0700 |
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committer | Craig Topper <craig.topper@sifive.com> | 2024-04-03 18:49:55 -0700 |
commit | a853d79963c6ac09154817690a8c317157345876 (patch) | |
tree | 49bc92420e04194ca0f8ac328411a41711711b9d | |
parent | 1f01c580444ea2daef67f95ffc5fde2de5a37cec (diff) | |
download | llvm-a853d79963c6ac09154817690a8c317157345876.zip llvm-a853d79963c6ac09154817690a8c317157345876.tar.gz llvm-a853d79963c6ac09154817690a8c317157345876.tar.bz2 |
[RISCV][GISel] Don't check for FP uses of of IMPLICIT_DEF if the type is vector. NFC
If the type is vector, we can immediately know to use vector mapping.
Previously we searched for FP uses, but then replaced it if the type
was vector.
-rw-r--r-- | llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp index 4f34514..8534024 100644 --- a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp +++ b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp @@ -341,18 +341,17 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case TargetOpcode::G_IMPLICIT_DEF: { Register Dst = MI.getOperand(0).getReg(); LLT DstTy = MRI.getType(Dst); - uint64_t DstMinSize = DstTy.getSizeInBits().getKnownMinValue(); + unsigned DstMinSize = DstTy.getSizeInBits().getKnownMinValue(); auto Mapping = GPRValueMapping; // FIXME: May need to do a better job determining when to use FPRB. // For example, the look through COPY case: // %0:_(s32) = G_IMPLICIT_DEF // %1:_(s32) = COPY %0 // $f10_d = COPY %1(s32) - if (anyUseOnlyUseFP(Dst, MRI, TRI)) - Mapping = getFPValueMapping(DstMinSize); - if (DstTy.isVector()) Mapping = getVRBValueMapping(DstMinSize); + else if (anyUseOnlyUseFP(Dst, MRI, TRI)) + Mapping = getFPValueMapping(DstMinSize); return getInstructionMapping(DefaultMappingID, /*Cost=*/1, Mapping, NumOperands); |