aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPaul Walker <paul.walker@arm.com>2023-12-08 17:59:47 +0000
committerPaul Walker <paul.walker@arm.com>2023-12-08 18:01:12 +0000
commit94c837345c27e173284a85471d4efda19eded08e (patch)
treefd4f9dda84a930c3be9ed1e4f7bc0ab95436a003
parent66b919cb29494bca987138a23ef8f0b68bfe9d3c (diff)
downloadllvm-94c837345c27e173284a85471d4efda19eded08e.zip
llvm-94c837345c27e173284a85471d4efda19eded08e.tar.gz
llvm-94c837345c27e173284a85471d4efda19eded08e.tar.bz2
[NFC] A few whitespace changes.
-rw-r--r--clang/include/clang/Basic/DiagnosticFrontendKinds.td1
-rw-r--r--llvm/include/llvm/Analysis/TargetTransformInfo.h6
-rw-r--r--llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h1
3 files changed, 5 insertions, 3 deletions
diff --git a/clang/include/clang/Basic/DiagnosticFrontendKinds.td b/clang/include/clang/Basic/DiagnosticFrontendKinds.td
index 715e0c0d..5680001 100644
--- a/clang/include/clang/Basic/DiagnosticFrontendKinds.td
+++ b/clang/include/clang/Basic/DiagnosticFrontendKinds.td
@@ -80,6 +80,7 @@ def remark_fe_backend_optimization_remark_analysis_aliasing : Remark<"%0; "
"the '__restrict__' qualifier with the independent array arguments. "
"Erroneous results will occur if these options are incorrectly applied!">,
BackendInfo, InGroup<BackendOptimizationRemarkAnalysis>;
+
def warn_fe_backend_optimization_failure : Warning<"%0">, BackendInfo,
InGroup<BackendOptimizationFailure>, DefaultWarn;
def note_fe_backend_invalid_loc : Note<"could "
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 8635bdd..fb6f328 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -2376,12 +2376,12 @@ public:
bool IsZeroCmp) const override {
return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp);
}
- bool enableInterleavedAccessVectorization() override {
- return Impl.enableInterleavedAccessVectorization();
- }
bool enableSelectOptimize() override {
return Impl.enableSelectOptimize();
}
+ bool enableInterleavedAccessVectorization() override {
+ return Impl.enableInterleavedAccessVectorization();
+ }
bool enableMaskedInterleavedAccessVectorization() override {
return Impl.enableMaskedInterleavedAccessVectorization();
}
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
index fa4c93d..0b22006 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
@@ -291,6 +291,7 @@ public:
bool isLegalMaskedGather(Type *DataType, Align Alignment) const {
return isLegalMaskedGatherScatter(DataType);
}
+
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const {
return isLegalMaskedGatherScatter(DataType);
}