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| author | Michał Górny <mgorny@moritz.systems> | 2020-10-01 19:31:59 +0200 |
|---|---|---|
| committer | Michał Górny <mgorny@moritz.systems> | 2020-10-03 19:54:38 +0200 |
| commit | 80b108f404fc9e88889df7247f6ae9697083cbda (patch) | |
| tree | a56a5bd6e7335ca0914bed23a1bf044b1d04ca7a | |
| parent | 66e493f81e8e27b4a498a6dac54d404c2333fa5e (diff) | |
| download | llvm-80b108f404fc9e88889df7247f6ae9697083cbda.zip llvm-80b108f404fc9e88889df7247f6ae9697083cbda.tar.gz llvm-80b108f404fc9e88889df7247f6ae9697083cbda.tar.bz2 | |
[lldb] [Process/NetBSD] Fix reading FIP/FDP registers
Fix reading FIP/FDP registers to correctly return segment and offset
parts. On amd64, this roughly matches the Linux behavior of splitting
the 64-bit FIP/FDP into two halves, and putting the higher 32 bits
into f*seg and lower into f*off. Well, actually we use only 16 bits
of higher half but the CPUs do not seem to handle more than that anyway.
Differential Revision: https://reviews.llvm.org/D88681
| -rw-r--r-- | lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp b/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp index af8b2a2..089ae4f 100644 --- a/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp +++ b/lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp @@ -657,13 +657,13 @@ NativeRegisterContextNetBSD_x86_64::ReadRegister(const RegisterInfo *reg_info, reg_value = (uint64_t)m_fpr.fxstate.fx_opcode; break; case lldb_fiseg_x86_64: - reg_value = (uint64_t)m_fpr.fxstate.fx_ip.fa_64; + reg_value = (uint32_t)m_fpr.fxstate.fx_ip.fa_32.fa_seg; break; case lldb_fioff_x86_64: reg_value = (uint32_t)m_fpr.fxstate.fx_ip.fa_32.fa_off; break; case lldb_foseg_x86_64: - reg_value = (uint64_t)m_fpr.fxstate.fx_dp.fa_64; + reg_value = (uint32_t)m_fpr.fxstate.fx_dp.fa_32.fa_seg; break; case lldb_fooff_x86_64: reg_value = (uint32_t)m_fpr.fxstate.fx_dp.fa_32.fa_off; @@ -945,13 +945,13 @@ Status NativeRegisterContextNetBSD_x86_64::WriteRegister( m_fpr.fxstate.fx_opcode = reg_value.GetAsUInt16(); break; case lldb_fiseg_x86_64: - m_fpr.fxstate.fx_ip.fa_64 = reg_value.GetAsUInt64(); + m_fpr.fxstate.fx_ip.fa_32.fa_seg = reg_value.GetAsUInt32(); break; case lldb_fioff_x86_64: m_fpr.fxstate.fx_ip.fa_32.fa_off = reg_value.GetAsUInt32(); break; case lldb_foseg_x86_64: - m_fpr.fxstate.fx_dp.fa_64 = reg_value.GetAsUInt64(); + m_fpr.fxstate.fx_dp.fa_32.fa_seg = reg_value.GetAsUInt32(); break; case lldb_fooff_x86_64: m_fpr.fxstate.fx_dp.fa_32.fa_off = reg_value.GetAsUInt32(); |