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author | Craig Topper <craig.topper@intel.com> | 2020-10-03 17:12:23 -0700 |
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committer | Craig Topper <craig.topper@intel.com> | 2020-10-03 18:44:53 -0700 |
commit | 7f3da488852b157e456333cc40048526409d4592 (patch) | |
tree | 10a9d69a2e4395f295af930fd090dea5bb3ad550 | |
parent | e9b87f43bde8b5f0d8a79c5884fdce639b12e0ca (diff) | |
download | llvm-7f3da488852b157e456333cc40048526409d4592.zip llvm-7f3da488852b157e456333cc40048526409d4592.tar.gz llvm-7f3da488852b157e456333cc40048526409d4592.tar.bz2 |
[X86] Remove X86ISD::MWAITX_DAG. Just match the intrinsic to the custom inserter pseudo instruction during isel.
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 15 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 3 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrCompiler.td | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 10 | ||||
-rw-r--r-- | llvm/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s | 2 | ||||
-rw-r--r-- | llvm/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s | 2 | ||||
-rw-r--r-- | llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s | 2 |
7 files changed, 5 insertions, 31 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e526a1d..a49847d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -25952,20 +25952,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget, return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC, Operation.getValue(1)); } - case Intrinsic::x86_mwaitx: { - // If the current function needs the base pointer, RBX, - // we shouldn't use mwaitx directly. - // Indeed the lowering of that instruction will clobber - // that register and since RBX will be a reserved register - // the register allocator will not make sure its value will - // be properly saved and restored around this live-range. - SDLoc dl(Op); - unsigned Opcode = X86ISD::MWAITX_DAG; - SDValue Chain = DAG.getNode(Opcode, dl, MVT::Other, - {Op->getOperand(0), Op->getOperand(2), - Op->getOperand(3), Op->getOperand(4)}); - return Chain; - } case Intrinsic::x86_encodekey128: case Intrinsic::x86_encodekey256: { SDLoc DL(Op); @@ -30848,7 +30834,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { NODE_NAME_CASE(LCMPXCHG16_DAG) NODE_NAME_CASE(LCMPXCHG8_SAVE_EBX_DAG) NODE_NAME_CASE(LCMPXCHG16_SAVE_RBX_DAG) - NODE_NAME_CASE(MWAITX_DAG) NODE_NAME_CASE(LADD) NODE_NAME_CASE(LSUB) NODE_NAME_CASE(LOR) diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 9f231be..00ead0c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -710,9 +710,6 @@ namespace llvm { // For avx512-vp2intersect VP2INTERSECT, - // Mwaitx builtin is lowered to this if the base pointer needs saving. - MWAITX_DAG, - // Key locker nodes that produce flags. AESENC128KL, AESDEC128KL, diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td index 4f81c27..9e6a5fb 100644 --- a/llvm/lib/Target/X86/X86InstrCompiler.td +++ b/llvm/lib/Target/X86/X86InstrCompiler.td @@ -930,7 +930,7 @@ def MWAITX : I<0, Pseudo, (outs), (ins GR32:$ecx, GR32:$eax, GR32:$ebx), "mwaitx", - [(X86mwaitx GR32:$ecx, GR32:$eax, GR32:$ebx)]>; + [(int_x86_mwaitx GR32:$ecx, GR32:$eax, GR32:$ebx)]>; } diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 3a3d141..47de7d6 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -77,9 +77,6 @@ def SDTX86caspairSaveRbx16 : SDTypeProfile<1, 3, [SDTCisVT<0, i64>, SDTCisPtrTy<1>, SDTCisVT<2, i64>, SDTCisVT<3, i64>]>; -def SDTX86mwaitx : SDTypeProfile<0, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>, - SDTCisVT<2, i32>]>; - def SDTLockBinaryArithWithFlags : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisInt<2>]>; @@ -192,10 +189,6 @@ def X86cas16save_rbx : SDNode<"X86ISD::LCMPXCHG16_SAVE_RBX_DAG", [SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore, SDNPMayLoad, SDNPMemOperand]>; -def X86mwaitx : SDNode<"X86ISD::MWAITX_DAG", SDTX86mwaitx, - [SDNPHasChain, SDNPInGlue, SDNPOutGlue, SDNPMayStore, - SDNPMayLoad]>; - def X86retflag : SDNode<"X86ISD::RET_FLAG", SDTX86Ret, [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; def X86iret : SDNode<"X86ISD::IRET", SDTX86Ret, @@ -2811,8 +2804,7 @@ let SchedRW = [ WriteSystem ] in { let Uses = [ ECX, EAX, EBX ] in { def MWAITXrrr : I<0x01, MRM_FB, (outs), (ins), "mwaitx", - [(int_x86_mwaitx ECX, EAX, EBX)]>, - TB, Requires<[ HasMWAITX ]>; + []>, TB, Requires<[ HasMWAITX ]>; } } // SchedRW diff --git a/llvm/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s b/llvm/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s index 517b283..5f8125f 100644 --- a/llvm/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s +++ b/llvm/test/tools/llvm-mca/X86/Generic/resources-mwaitx.s @@ -14,7 +14,7 @@ mwaitx # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 100 0.33 U monitorx -# CHECK-NEXT: 1 100 0.33 * * U mwaitx +# CHECK-NEXT: 1 100 0.33 U mwaitx # CHECK: Resources: # CHECK-NEXT: [0] - SBDivider diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s index c296b21..4aafec7 100644 --- a/llvm/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-mwaitx.s @@ -14,7 +14,7 @@ mwaitx # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 100 0.25 U monitorx -# CHECK-NEXT: 1 100 0.25 * * U mwaitx +# CHECK-NEXT: 1 100 0.25 U mwaitx # CHECK: Resources: # CHECK-NEXT: [0] - ZnAGU0 diff --git a/llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s b/llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s index 6c2b815..d33ccce 100644 --- a/llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s +++ b/llvm/test/tools/llvm-mca/X86/Znver2/resources-mwaitx.s @@ -14,7 +14,7 @@ mwaitx # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 100 0.25 U monitorx -# CHECK-NEXT: 1 100 0.25 * * U mwaitx +# CHECK-NEXT: 1 100 0.25 U mwaitx # CHECK: Resources: # CHECK-NEXT: [0] - Zn2AGU0 |