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authorSimon Pilgrim <llvm-dev@redking.me.uk>2023-12-08 12:24:45 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2023-12-08 12:24:55 +0000
commit22fbd07bd768e7a7289815846ba37accd5dab9bd (patch)
tree03f4d67f5d487acfa2038a25130deb3842fce665
parent5ea6a3fc6d64d593f447e306c3a9d39e9924ea58 (diff)
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[X86] combineLoad - consistently use cast<MemSDNode>. NFCI.
getBasePtr()/getMemoryVT() are common methods for all memory nodes.
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f7fe82f..6d7c279 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -49886,8 +49886,8 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
User->getValueSizeInBits(0).getFixedValue() >
RegVT.getFixedSizeInBits()) {
if (User->getOpcode() == X86ISD::SUBV_BROADCAST_LOAD &&
- cast<MemIntrinsicSDNode>(User)->getBasePtr() == Ptr &&
- cast<MemIntrinsicSDNode>(User)->getMemoryVT().getSizeInBits() ==
+ cast<MemSDNode>(User)->getBasePtr() == Ptr &&
+ cast<MemSDNode>(User)->getMemoryVT().getSizeInBits() ==
MemVT.getSizeInBits()) {
SDValue Extract = extractSubVector(SDValue(User, 0), 0, DAG, SDLoc(N),
RegVT.getSizeInBits());
@@ -49915,7 +49915,7 @@ static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
if (ISD::isNormalLoad(User)) {
// See if we are loading a constant that matches in the lower
// bits of a longer constant (but from a different constant pool ptr).
- SDValue UserPtr = cast<LoadSDNode>(User)->getBasePtr();
+ SDValue UserPtr = cast<MemSDNode>(User)->getBasePtr();
const Constant *LdC = getTargetConstantFromBasePtr(Ptr);
const Constant *UserC = getTargetConstantFromBasePtr(UserPtr);
if (LdC && UserC && UserPtr != Ptr &&