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| author | Kai Luo <lkail@cn.ibm.com> | 2024-06-20 12:06:47 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-20 12:06:47 +0800 |
| commit | 480a788e4946ac7b313291f26bca19aa65d649f1 (patch) | |
| tree | 1aa4d2785dfc128ba8fe8cfd2ede722d656a2138 | |
| parent | fa0666876cdf11162af341911b99311a56be2274 (diff) | |
| download | llvm-480a788e4946ac7b313291f26bca19aa65d649f1.zip llvm-480a788e4946ac7b313291f26bca19aa65d649f1.tar.gz llvm-480a788e4946ac7b313291f26bca19aa65d649f1.tar.bz2 | |
[PowerPC] Make verifier happy after peephole on MMA COPYs (#94321)
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll | 43 |
2 files changed, 39 insertions, 7 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index c5684c7..0b515c9 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -448,6 +448,9 @@ void PPCMIPeephole::convertUnprimedAccPHIs( if (MRI->isSSA()) addRegToUpdate(RegMBB.first.getReg()); } + // The liveness of old PHI and new PHI have to be updated. + addRegToUpdate(PHI->getOperand(0).getReg()); + addRegToUpdate(AccReg); ChangedPHIMap[PHI] = NewPHI.getInstr(); LLVM_DEBUG(dbgs() << "Converting PHI: "); LLVM_DEBUG(PHI->dump()); diff --git a/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll b/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll index 7ce5240..37df4d6 100644 --- a/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll +++ b/llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll @@ -1,14 +1,43 @@ -;REQUIRES: asserts -;RUN: not --crash llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s 2>&1 | FileCheck %s - -;CHECK: %[[PHI1:[0-9]+]]:accrc = PHI -;CHECK: %[[PHI0:[0-9]+]]:uaccrc = PHI -;CHECK: Virtual register %[[PHI0]] is not needed live through the block. -;CHECK: Virtual register %[[PHI1]] must be live through the block. +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s | FileCheck %s target datalayout = "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512" define void @baz(i64 %arg) local_unnamed_addr #0 { +; CHECK-LABEL: baz: +; CHECK: # %bb.0: # %bb +; CHECK-NEXT: xxmfacc 0 +; CHECK-NEXT: xxmrgld 0, 0, 2 +; CHECK-NEXT: xxlxor 1, 1, 1 +; CHECK-NEXT: xvnegdp 2, 0 +; CHECK-NEXT: xvnegdp 0, 0 +; CHECK-NEXT: xvsubdp 2, 2, 1 +; CHECK-NEXT: xvsubdp 0, 0, 3 +; CHECK-NEXT: xvmuldp 2, 2, 1 +; CHECK-NEXT: xvmuldp 0, 0, 1 +; CHECK-NEXT: xvmaddadp 2, 1, 1 +; CHECK-NEXT: xvmaddadp 0, 1, 1 +; CHECK-NEXT: stxv 2, 0(3) +; CHECK-NEXT: stxv 0, 0(3) +; CHECK-NEXT: # implicit-def: $acc0 +; CHECK-NEXT: bc 12, 20, L..BB0_2 +; CHECK-NEXT: # %bb.1: # %bb10 +; CHECK-NEXT: xvf64gerpp 0, 34, 0 +; CHECK-NEXT: L..BB0_2: # %bb12 +; CHECK-NEXT: cmpdi 3, 0 +; CHECK-NEXT: L..BB0_3: # %bb13 +; CHECK-NEXT: # +; CHECK-NEXT: bc 4, 2, L..BB0_3 +; CHECK-NEXT: # %bb.4: # %bb14 +; CHECK-NEXT: xxmfacc 0 +; CHECK-NEXT: xxlxor 0, 0, 0 +; CHECK-NEXT: xxlxor 2, 2, 2 +; CHECK-NEXT: xvsubdp 1, 0, 1 +; CHECK-NEXT: xvmaddadp 2, 1, 2 +; CHECK-NEXT: xvadddp 0, 2, 0 +; CHECK-NEXT: xxswapd 0, 0 +; CHECK-NEXT: stxv 0, 0(3) +; CHECK-NEXT: blr bb: %call = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> poison) %extractvalue = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %call, 0 |