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| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2024-06-20 10:00:59 +0000 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2024-06-20 10:00:59 +0000 |
| commit | 37495cbd2f8661bddcb1cf5b7f30d1cc47297766 (patch) | |
| tree | 5ec08b484350abb1bc4f3b1b33b193d9890d6e5e | |
| parent | ffc51b966e74b89092cd57909d8659756aae106a (diff) | |
| download | llvm-37495cbd2f8661bddcb1cf5b7f30d1cc47297766.zip llvm-37495cbd2f8661bddcb1cf5b7f30d1cc47297766.tar.gz llvm-37495cbd2f8661bddcb1cf5b7f30d1cc47297766.tar.bz2 | |
[AMDGPU] Define constrained multi-dword scalar load instructions.users/cdevadas/constrained-sload-insns
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SMInstructions.td | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td index df1722b..4551a3a 100644 --- a/llvm/lib/Target/AMDGPU/SMInstructions.td +++ b/llvm/lib/Target/AMDGPU/SMInstructions.td @@ -167,6 +167,20 @@ multiclass SM_Pseudo_Loads<RegisterClass baseClass, def _IMM : SM_Load_Pseudo <opName, baseClass, dstClass, IMM_Offset>; def _SGPR : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_Offset>; def _SGPR_IMM : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_IMM_Offset>; + + // The constrained multi-dword load equivalents with early clobber flag at + // the dst operand. They are needed only for codegen and there is no need for + // their real opcodes. + let SubtargetPredicate = isGFX8Plus, + Constraints = !if(!gt(dstClass.RegTypes[0].Size, 32), + "@earlyclobber $sdst", "") in { + let PseudoInstr = NAME # !cast<OffsetMode>(IMM_Offset).Variant in + def _IMM_ec : SM_Load_Pseudo <opName, baseClass, dstClass, IMM_Offset>; + let PseudoInstr = NAME # !cast<OffsetMode>(SGPR_Offset).Variant in + def _SGPR_ec : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_Offset>; + let PseudoInstr = NAME # !cast<OffsetMode>(SGPR_IMM_Offset).Variant in + def _SGPR_IMM_ec : SM_Load_Pseudo <opName, baseClass, dstClass, SGPR_IMM_Offset>; + } } multiclass SM_Pseudo_Stores<RegisterClass baseClass, |