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| author | Piotr Sobczak <piotr.sobczak@amd.com> | 2023-12-12 15:38:06 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-12 15:38:06 +0100 |
| commit | cd138fddf1b52a43108376371ad1c38585aaa4e2 (patch) | |
| tree | e800cd9607c781287271e10411520c7da316879d | |
| parent | 10582cbf2e967f5886ec674ca79dc65c6f0f03f7 (diff) | |
| download | llvm-cd138fddf1b52a43108376371ad1c38585aaa4e2.zip llvm-cd138fddf1b52a43108376371ad1c38585aaa4e2.tar.gz llvm-cd138fddf1b52a43108376371ad1c38585aaa4e2.tar.bz2 | |
[AMDGPU] Turn off clang-format in moveToVALU (#75188)
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index dda54a0..42eb4fa 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -5157,6 +5157,9 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI, return true; } +// It is more readable to list mapped opcodes on the same line. +// clang-format off + unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const { switch (MI.getOpcode()) { default: return AMDGPU::INSTRUCTION_LIST_END; @@ -5296,6 +5299,8 @@ unsigned SIInstrInfo::getVALUOp(const MachineInstr &MI) const { "Unexpected scalar opcode without corresponding vector one!"); } +// clang-format on + void SIInstrInfo::insertScratchExecCopy(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, |