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author | Anatoly Trosinenko <atrosinenko@accesssoftek.com> | 2025-07-10 21:39:24 +0300 |
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committer | Anatoly Trosinenko <atrosinenko@accesssoftek.com> | 2025-07-25 13:12:01 +0300 |
commit | f7c8856ce98bbe2b3495a0d6c5bd7ed9fc5ac24a (patch) | |
tree | ea2d13a29b0024f032092eb6f739184112303e8b | |
parent | f60ec59b259f8b0b087db353423464dd1783b38e (diff) | |
download | llvm-users/atrosinenko/pauth-imm-modifier-auth-resign.zip llvm-users/atrosinenko/pauth-imm-modifier-auth-resign.tar.gz llvm-users/atrosinenko/pauth-imm-modifier-auth-resign.tar.bz2 |
s/fixupBlendComponents/fixupPtrauthDiscriminator/users/atrosinenko/pauth-imm-modifier-auth-resign
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 13a86d9..2e53b3d 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -3278,22 +3278,22 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter( return EmitZTInstr(MI, BB, AArch64::MOVT_TIZ, /*Op0IsDef=*/true); case AArch64::AUTx16x17: - fixupBlendComponents(MI, BB, MI.getOperand(1), MI.getOperand(2), - &AArch64::GPR64noipRegClass); + fixupPtrauthDiscriminator(MI, BB, MI.getOperand(1), MI.getOperand(2), + &AArch64::GPR64noipRegClass); return BB; case AArch64::AUTxMxN: - fixupBlendComponents(MI, BB, MI.getOperand(4), MI.getOperand(5), - &AArch64::GPR64noipRegClass); + fixupPtrauthDiscriminator(MI, BB, MI.getOperand(4), MI.getOperand(5), + &AArch64::GPR64noipRegClass); return BB; case AArch64::PAC: fixupPtrauthDiscriminator(MI, BB, MI.getOperand(3), MI.getOperand(4), &AArch64::GPR64noipRegClass); return BB; case AArch64::AUTPAC: - fixupBlendComponents(MI, BB, MI.getOperand(1), MI.getOperand(2), - &AArch64::GPR64noipRegClass); - fixupBlendComponents(MI, BB, MI.getOperand(4), MI.getOperand(5), - &AArch64::GPR64noipRegClass); + fixupPtrauthDiscriminator(MI, BB, MI.getOperand(1), MI.getOperand(2), + &AArch64::GPR64noipRegClass); + fixupPtrauthDiscriminator(MI, BB, MI.getOperand(4), MI.getOperand(5), + &AArch64::GPR64noipRegClass); return BB; } } |