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authorJeremy Morse <jeremy.morse@sony.com>2024-01-22 14:25:08 +0000
committerGitHub <noreply@github.com>2024-01-22 14:25:08 +0000
commit52a8bed426e59d10b41a12208d3ba55cd2c76a1f (patch)
treeba1ab7081a385aa51afe2da5f0ad21e9a4c1f866
parent70823fe4871eb6ca3fe8dc8264ac005c8edbfe70 (diff)
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[DebugInfo][RemoveDIs] Adjust AMDGPU passes to work with DPValues (#78736)
This patch tweaks two AMDGPU passes to use iterators rather than instruction pointers for expressing an insertion point. This is needed to accurately support DPValues, the non-instruction storage object for debug-info. Two tests were sensitive to this change (variable assignments were being put in the wrong place), and I've added extra run-lines with the "try new debug-info..." flag. These get tested on our public buildbot to ensure they continue to work accurately.
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp7
-rw-r--r--llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll3
-rw-r--r--llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll1
4 files changed, 9 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
index 1c514ff..015c7108 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
@@ -106,7 +106,7 @@ static bool lowerKernelArguments(Function &F, const TargetMachine &TM) {
LLVMContext &Ctx = F.getParent()->getContext();
const DataLayout &DL = F.getParent()->getDataLayout();
BasicBlock &EntryBlock = *F.begin();
- IRBuilder<> Builder(&*getInsertPt(EntryBlock));
+ IRBuilder<> Builder(&EntryBlock, getInsertPt(EntryBlock));
const Align KernArgBaseAlign(16); // FIXME: Increase if necessary
const uint64_t BaseOffset = ST.getExplicitKernelArgOffset();
diff --git a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
index 932c0d6..c921e5a 100644
--- a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
+++ b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
@@ -329,15 +329,16 @@ bool SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) {
}
Value *Exec = popSaved();
- Instruction *FirstInsertionPt = &*BB->getFirstInsertionPt();
+ BasicBlock::iterator FirstInsertionPt = BB->getFirstInsertionPt();
if (!isa<UndefValue>(Exec) && !isa<UnreachableInst>(FirstInsertionPt)) {
Instruction *ExecDef = cast<Instruction>(Exec);
BasicBlock *DefBB = ExecDef->getParent();
if (!DT->dominates(DefBB, BB)) {
// Split edge to make Def dominate Use
- FirstInsertionPt = &*SplitEdge(DefBB, BB, DT, LI)->getFirstInsertionPt();
+ FirstInsertionPt = SplitEdge(DefBB, BB, DT, LI)->getFirstInsertionPt();
}
- IRBuilder<>(FirstInsertionPt).CreateCall(EndCf, {Exec});
+ IRBuilder<>(FirstInsertionPt->getParent(), FirstInsertionPt)
+ .CreateCall(EndCf, {Exec});
}
return true;
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll b/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
index 7414ec9..a496e1c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
@@ -1,6 +1,9 @@
; RUN: llc -O0 -mtriple=amdgcn-unknown-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,NOOPT %s
; RUN: llc -mtriple=amdgcn-unknown-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,OPT %s
+; RUN: llc -O0 -mtriple=amdgcn-unknown-amdhsa -verify-machineinstrs < %s --try-experimental-debuginfo-iterators | FileCheck -check-prefixes=GCN,NOOPT %s
+; RUN: llc -mtriple=amdgcn-unknown-amdhsa -verify-machineinstrs < %s --try-experimental-debuginfo-iterators | FileCheck -check-prefixes=GCN,OPT %s
+
; GCN-LABEL: {{^}}test_debug_value:
; NOOPT: .loc 1 1 42 prologue_end ; /tmp/test_debug_value.cl:1:42
; NOOPT-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll b/llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
index 215c324..a7af020 100644
--- a/llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-annotate-dbg-info.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s | FileCheck -check-prefix=OPT %s
+; RUN: opt -mtriple=amdgcn-- -S -structurizecfg -si-annotate-control-flow %s --try-experimental-debuginfo-iterators | FileCheck -check-prefix=OPT %s
define amdgpu_ps i32 @if_else(i32 %0) !dbg !5 {
; OPT-LABEL: define amdgpu_ps i32 @if_else(