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author | Nick Anderson <nickleus27@gmail.com> | 2024-02-18 07:49:15 -0800 |
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committer | GitHub <noreply@github.com> | 2024-02-18 21:19:15 +0530 |
commit | 767433ba88212b70da51ddc41727624c790cc329 (patch) | |
tree | ab61c2957e911ec8f1b9f851fc32437b656fffca | |
parent | ba27c3963d785a023cc8963ec3b6f508fe31527e (diff) | |
download | llvm-767433ba88212b70da51ddc41727624c790cc329.zip llvm-767433ba88212b70da51ddc41727624c790cc329.tar.gz llvm-767433ba88212b70da51ddc41727624c790cc329.tar.bz2 |
[AMDGPU] fixes duplicate expressions in if stmnts in SIISelLowering.cpp (#82018)
fixes #81766
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 7be670f..5e1d750 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -6306,7 +6306,7 @@ SDValue SITargetLowering::lowerFMINNUM_FMAXNUM(SDValue Op, return expandFMINNUM_FMAXNUM(Op.getNode(), DAG); if (VT == MVT::v4f16 || VT == MVT::v8f16 || VT == MVT::v16f16 || - VT == MVT::v16f16) + VT == MVT::v32f16) return splitBinaryVectorOp(Op, DAG); return Op; } @@ -14571,7 +14571,7 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N, EVT VT = N->getValueType(0); // v2i16 (scalar_to_vector i16:x) -> v2i16 (bitcast (any_extend i16:x)) - if (VT == MVT::v2i16 || VT == MVT::v2f16 || VT == MVT::v2f16) { + if (VT == MVT::v2i16 || VT == MVT::v2f16 || VT == MVT::v2bf16) { SDLoc SL(N); SDValue Src = N->getOperand(0); EVT EltVT = Src.getValueType(); |