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| author | Stanislav Mekhanoshin <rampitec@users.noreply.github.com> | 2023-12-18 10:58:50 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-18 10:58:50 -0800 |
| commit | 94230ce548c2f69db4cf9ef92ccb51d59030e7e3 (patch) | |
| tree | 3f061d0f5f8c637d99950b01b55bf401cd1781ce | |
| parent | 4f54d71501815877898aaa6d764b8468d0708ed6 (diff) | |
| download | llvm-94230ce548c2f69db4cf9ef92ccb51d59030e7e3.zip llvm-94230ce548c2f69db4cf9ef92ccb51d59030e7e3.tar.gz llvm-94230ce548c2f69db4cf9ef92ccb51d59030e7e3.tar.bz2 | |
[AMDGPU] Fix lack of LDS DMA check in the AA handling (#75249)
SIInstrInfo::areMemAccessesTriviallyDisjoint does a DS offset checks,
but does not account for LDS DMA instructions. Added these checks.
Without it code falls through and returns true which is wrong. As a
result mayAlias would always return false for LDS DMA and a regular LDS
instruction or 2 LDS DMA instructions.
At the moment this is NFCI because we do not use this AA in a context
which may touch LDS DMA instructions. This is also unreacheable now
because of the ordered memory ref checks just above in the function and
LDS DMA is marked as volatile. This volatile marking is removed in PR
#75247, therefore I'd submit this check before #75247.
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 70ef1ff..5d6462f 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -3654,6 +3654,9 @@ bool SIInstrInfo::areMemAccessesTriviallyDisjoint(const MachineInstr &MIa, if (MIa.hasOrderedMemoryRef() || MIb.hasOrderedMemoryRef()) return false; + if (isLDSDMA(MIa) || isLDSDMA(MIb)) + return false; + // TODO: Should we check the address space from the MachineMemOperand? That // would allow us to distinguish objects we know don't alias based on the // underlying address space, even if it was lowered to a different one, |