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author | Craig Topper <craig.topper@sifive.com> | 2024-04-03 17:11:45 -0700 |
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committer | Craig Topper <craig.topper@sifive.com> | 2024-04-03 17:16:33 -0700 |
commit | 7e2a1d6f23cb604203324b47237f8e463704a497 (patch) | |
tree | 4ea7bdc02c5d6af5ee305d957ed291f43ad1f986 | |
parent | ef5a7109116c1615a9c99c8dba6577853beb6c73 (diff) | |
download | llvm-7e2a1d6f23cb604203324b47237f8e463704a497.zip llvm-7e2a1d6f23cb604203324b47237f8e463704a497.tar.gz llvm-7e2a1d6f23cb604203324b47237f8e463704a497.tar.bz2 |
[RISCV] Remove G_TRUNC/ZEXT/SEXT/ANYEXT from the first switch in RISCVRegisterBankInfo::getInstrMapping.
This removes the special case for vectors. The default case in the
second switch can handle GPR in addition to vectors. We just won't
use the static ValueMapping entry.
-rw-r--r-- | llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp index bab95c5..4f34514 100644 --- a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp +++ b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp @@ -320,20 +320,10 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { case TargetOpcode::G_PTR_ADD: case TargetOpcode::G_PTRTOINT: case TargetOpcode::G_INTTOPTR: - case TargetOpcode::G_TRUNC: case TargetOpcode::G_SEXTLOAD: case TargetOpcode::G_ZEXTLOAD: return getInstructionMapping(DefaultMappingID, /*Cost=*/1, GPRValueMapping, NumOperands); - case TargetOpcode::G_ANYEXT: - case TargetOpcode::G_SEXT: - case TargetOpcode::G_ZEXT: { - // Handle vector extends in the default case below. - if (MRI.getType(MI.getOperand(0).getReg()).isVector()) - break; - return getInstructionMapping(DefaultMappingID, /*Cost=*/1, GPRValueMapping, - NumOperands); - } case TargetOpcode::G_FADD: case TargetOpcode::G_FSUB: case TargetOpcode::G_FMUL: |