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| author | David Green <david.green@arm.com> | 2024-03-27 18:36:02 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-27 18:36:02 +0000 |
| commit | 36e74cfdbde208e384c72bcb52ea638303fb7d67 (patch) | |
| tree | 90e25d801dc73f2f021b864079502523a5b3ac07 | |
| parent | f1ac559534788f8dd42191b60dfdf9cc56b39fd4 (diff) | |
| download | llvm-36e74cfdbde208e384c72bcb52ea638303fb7d67.zip llvm-36e74cfdbde208e384c72bcb52ea638303fb7d67.tar.gz llvm-36e74cfdbde208e384c72bcb52ea638303fb7d67.tar.bz2 | |
[AArch64] Clear kill flags when removing FMOVDr. (#86308)
The uses of OldDef/NewDef may not be killed in the same place they
previously were after they are replaced, and so need to be cleared.
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/peephole-movd.mir | 60 |
2 files changed, 63 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp index 6865850..22da7dd 100644 --- a/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp +++ b/llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp @@ -680,9 +680,11 @@ bool AArch64MIPeepholeOpt::visitFMOVDr(MachineInstr &MI) { // Let's remove MIs for high 64-bits. Register OldDef = MI.getOperand(0).getReg(); Register NewDef = MI.getOperand(1).getReg(); + LLVM_DEBUG(dbgs() << "Removing: " << MI << "\n"); + MRI->clearKillFlags(OldDef); + MRI->clearKillFlags(NewDef); MRI->constrainRegClass(NewDef, MRI->getRegClass(OldDef)); MRI->replaceRegWith(OldDef, NewDef); - LLVM_DEBUG(dbgs() << "Removed: " << MI << "\n"); MI.eraseFromParent(); return true; diff --git a/llvm/test/CodeGen/AArch64/peephole-movd.mir b/llvm/test/CodeGen/AArch64/peephole-movd.mir new file mode 100644 index 0000000..bd7f0ab --- /dev/null +++ b/llvm/test/CodeGen/AArch64/peephole-movd.mir @@ -0,0 +1,60 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s + +--- +name: remove_kill_flags +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $w0 + ; CHECK-LABEL: name: remove_kill_flags + ; CHECK: liveins: $w0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0 + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub + ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1 + ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub + ; CHECK-NEXT: [[TBLv8i8One:%[0-9]+]]:fpr64 = TBLv8i8One killed [[SUBREG_TO_REG]], [[UQSHLv8i8_shift]] + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub + ; CHECK-NEXT: RET_ReallyLR implicit $w0 + %0:fpr128 = MOVIv2d_ns 0 + %1:fpr64 = COPY %0.dsub:fpr128 + %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1 + %3:fpr64 = FMOVDr %2:fpr64 + %4:fpr128 = SUBREG_TO_REG 0, killed %3:fpr64, %subreg.dsub + %5:fpr64 = TBLv8i8One killed %4:fpr128, %2:fpr64 + %7:fpr128 = IMPLICIT_DEF + %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub + RET_ReallyLR implicit $w0 +... +--- +name: remove_kill_flags2 +tracksRegLiveness: true +body: | + bb.0.entry: + liveins: $w0 + ; CHECK-LABEL: name: remove_kill_flags2 + ; CHECK: liveins: $w0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0 + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub + ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1 + ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub + ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[UQSHLv8i8_shift]], %subreg.dsub + ; CHECK-NEXT: RET_ReallyLR implicit $w0 + %0:fpr128 = MOVIv2d_ns 0 + %1:fpr64 = COPY %0.dsub:fpr128 + %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1 + %3:fpr64 = FMOVDr %2:fpr64 + %4:fpr128 = SUBREG_TO_REG 0, %3:fpr64, %subreg.dsub + %7:fpr128 = IMPLICIT_DEF + %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub + %9:fpr128 = IMPLICIT_DEF + %8:fpr128 = INSERT_SUBREG %9:fpr128, killed %3:fpr64, %subreg.dsub + RET_ReallyLR implicit $w0 +... + |