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| author | Sanjay Patel <spatel@rotateright.com> | 2019-09-25 14:57:45 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2019-11-12 13:47:41 -0800 |
| commit | 07c142228696bba02c339563858f2da8f3376fd3 (patch) | |
| tree | d665641e8069b97680891878696417a9372fd6b1 | |
| parent | 0acab01d54de35ea1fdf790215e9caf4e139ac80 (diff) | |
| download | llvm-07c142228696bba02c339563858f2da8f3376fd3.zip llvm-07c142228696bba02c339563858f2da8f3376fd3.tar.gz llvm-07c142228696bba02c339563858f2da8f3376fd3.tar.bz2 | |
Merging r372883:
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r372883 | spatel | 2019-09-25 07:57:45 -0700 (Wed, 25 Sep 2019) | 1 line
[x86] add test for multi-use scalarization of vector binop; NFC
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| -rw-r--r-- | llvm/test/CodeGen/X86/scalarize-fp.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/scalarize-fp.ll b/llvm/test/CodeGen/X86/scalarize-fp.ll index 650b948..5c72d4b 100644 --- a/llvm/test/CodeGen/X86/scalarize-fp.ll +++ b/llvm/test/CodeGen/X86/scalarize-fp.ll @@ -773,3 +773,29 @@ define <8 x float> @splat0_fdiv_const_op0_v8f32(<8 x float> %vx) { %r = shufflevector <8 x float> %b, <8 x float> undef, <8 x i32> zeroinitializer ret <8 x float> %r } + +define <4 x float> @multi_use_binop(<4 x float> %x, <4 x float> %y) { +; SSE-LABEL: multi_use_binop: +; SSE: # %bb.0: +; SSE-NEXT: movaps %xmm0, %xmm2 +; SSE-NEXT: mulps %xmm1, %xmm2 +; SSE-NEXT: mulss %xmm1, %xmm0 +; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0] +; SSE-NEXT: addps %xmm1, %xmm0 +; SSE-NEXT: retq +; +; AVX-LABEL: multi_use_binop: +; AVX: # %bb.0: +; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm2 +; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 +; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0] +; AVX-NEXT: vmovddup {{.*#+}} xmm1 = xmm2[0,0] +; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0 +; AVX-NEXT: retq + %mul = fmul <4 x float> %x, %y + %mul0 = shufflevector <4 x float> %mul, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 0> + %mul1 = shufflevector <4 x float> %mul, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 undef, i32 1> + %r = fadd <4 x float> %mul0, %mul1 + ret <4 x float> %r +} |