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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-05 19:42:03 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-05 19:42:03 +0000 |
| commit | b73bafaff701aaabc18fe3d28a6afecb211cf485 (patch) | |
| tree | 8241f530e7975d0309ec651d74d6e7e25f121eb5 | |
| parent | 836f1e2be4cf0e458bbf9333dcb01d5c65dc3c56 (diff) | |
| download | llvm-b73bafaff701aaabc18fe3d28a6afecb211cf485.zip llvm-b73bafaff701aaabc18fe3d28a6afecb211cf485.tar.gz llvm-b73bafaff701aaabc18fe3d28a6afecb211cf485.tar.bz2 | |
Correct test in r362634
llvm-svn: 362635
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir index ce02e37..15c453f 100644 --- a/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir +++ b/llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir @@ -602,11 +602,11 @@ body: | ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 killed [[V_MOV_B32_e32_]], [[COPY]], implicit-def $vcc, implicit $exec - ; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e32_]] + ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]] %0:vgpr_32 = COPY $vgpr0 %1:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec - %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 killed %1, %0, 0, implicit $exec - S_ENDPGM 0, implicit %2 + %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 killed %1, %0, implicit $exec + S_ENDPGM implicit %2 ... --- @@ -620,11 +620,11 @@ body: | ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec ; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[V_MOV_B32_e32_]], killed [[COPY]], implicit-def $vcc, implicit $exec - ; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e32_]] + ; GCN: S_ENDPGM implicit [[V_ADD_I32_e32_]] %0:vgpr_32 = COPY $vgpr0 %1:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec - %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 %1, killed %0, 0, implicit $exec - S_ENDPGM 0, implicit %2 + %2:vgpr_32, %3:sreg_64_xexec = V_ADD_I32_e64 %1, killed %0, implicit $exec + S_ENDPGM implicit %2 ... --- @@ -638,11 +638,11 @@ body: | ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec ; GCN: [[COPY1:%[0-9]+]]:sreg_64_xexec = COPY $vcc - ; GCN: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADDC_U32_e64 [[V_MOV_B32_e32_]], [[COPY]], [[COPY1]], 0, implicit $exec - ; GCN: S_ENDPGM 0, implicit [[V_ADDC_U32_e64_]] + ; GCN: [[V_ADDC_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADDC_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADDC_U32_e64 [[V_MOV_B32_e32_]], [[COPY]], [[COPY1]], implicit $exec + ; GCN: S_ENDPGM implicit [[V_ADDC_U32_e64_]] %0:vgpr_32 = COPY $vgpr0 %1:vgpr_32 = V_MOV_B32_e32 518144, implicit $exec %2:sreg_64_xexec = COPY $vcc - %3:vgpr_32, %4:sreg_64_xexec = V_ADDC_U32_e64 %1, %0, %2, 0, implicit $exec - S_ENDPGM 0, implicit %3 + %3:vgpr_32, %4:sreg_64_xexec = V_ADDC_U32_e64 %1, %0, %2, implicit $exec + S_ENDPGM implicit %3 ... |