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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-03-12 16:23:09 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-03-12 16:23:09 +0000 |
commit | fedffd766da4e228a0d4cff1e3f63b866eb1ca68 (patch) | |
tree | fdb1851f8e0e489e1c377c366a89502c9043ef7b | |
parent | 101b70d6d1646a8cfff4b7c7efd85bcfa0d563a3 (diff) | |
download | llvm-fedffd766da4e228a0d4cff1e3f63b866eb1ca68.zip llvm-fedffd766da4e228a0d4cff1e3f63b866eb1ca68.tar.gz llvm-fedffd766da4e228a0d4cff1e3f63b866eb1ca68.tar.bz2 |
Merging r217254:
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r217254 | tomatabacu | 2014-09-05 16:43:21 +0100 (Fri, 05 Sep 2014) | 9 lines
[mips] Rename data members and member functions in MipsAssemblerOptions.
Summary: Use the naming convention from the LLVM Coding Standards.
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D4972
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llvm-svn: 232054
-rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 2d65b08..6e5be8b 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -38,23 +38,23 @@ class MCInstrInfo; namespace { class MipsAssemblerOptions { public: - MipsAssemblerOptions() : aTReg(1), reorder(true), macro(true) {} + MipsAssemblerOptions() : ATReg(1), Reorder(true), Macro(true) {} - unsigned getATRegNum() { return aTReg; } + unsigned getATRegNum() { return ATReg; } bool setATReg(unsigned Reg); - bool isReorder() { return reorder; } - void setReorder() { reorder = true; } - void setNoreorder() { reorder = false; } + bool isReorder() { return Reorder; } + void setReorder() { Reorder = true; } + void setNoReorder() { Reorder = false; } - bool isMacro() { return macro; } - void setMacro() { macro = true; } - void setNomacro() { macro = false; } + bool isMacro() { return Macro; } + void setMacro() { Macro = true; } + void setNoMacro() { Macro = false; } private: - unsigned aTReg; - bool reorder; - bool macro; + unsigned ATReg; + bool Reorder; + bool Macro; }; } @@ -1568,7 +1568,7 @@ bool MipsAssemblerOptions::setATReg(unsigned Reg) { if (Reg > 31) return false; - aTReg = Reg; + ATReg = Reg; return true; } @@ -2409,7 +2409,7 @@ bool MipsAsmParser::parseSetNoReorderDirective() { reportParseError("unexpected token in statement"); return false; } - Options.setNoreorder(); + Options.setNoReorder(); getTargetStreamer().emitDirectiveSetNoReorder(); Parser.Lex(); // Consume the EndOfStatement. return false; @@ -2438,7 +2438,7 @@ bool MipsAsmParser::parseSetNoMacroDirective() { reportParseError("`noreorder' must be set before `nomacro'"); return false; } - Options.setNomacro(); + Options.setNoMacro(); Parser.Lex(); // Consume the EndOfStatement. return false; } |