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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-03-16 10:40:59 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-03-16 10:40:59 +0000 |
commit | 4dbd3c9853616242b537915a3843a24b3eebd93b (patch) | |
tree | 7c176904ef8fa1ec8d61f1c1f44632388c17353a | |
parent | b9f83dd2e70a55d2739dedcf4fe32f0031f4e3ce (diff) | |
download | llvm-4dbd3c9853616242b537915a3843a24b3eebd93b.zip llvm-4dbd3c9853616242b537915a3843a24b3eebd93b.tar.gz llvm-4dbd3c9853616242b537915a3843a24b3eebd93b.tar.bz2 |
Added MIPS changes to release notes for 3.5.2.
llvm-svn: 232369
-rw-r--r-- | llvm/docs/ReleaseNotes.rst | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 87f96a6..d95c772 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -27,6 +27,28 @@ Non-comprehensive list of changes in this release Changes to the MIPS Target -------------------------- +* Corrected inline assembly to use the same assembler options as GCC for the + duration of the inline assembly block. Particularly, ``.set reorder``, + ``.set nomacro``, and ``.set noat`` are now correct. + +* Added ability to specify $gp as a named register global variable. + +* Added support for ``.set push`` and ``.set pop``. + +* Fixed a code generation bug in the comparison operators for MIPS32r6/MIPS64r6 + where the compiler would use ``<`` when it should have used ``<=``. + +* Fixed various assertions when using 128-bit integers on 64-bit targets. + +* Fixed invalid use of an odd-numbered single-precision floating point register + when using ``-mno-odd-spreg`` with ``-msa``. + +Non-comprehensive list of changes in 3.5.1 +========================================== + +Changes to the MIPS Target +-------------------------- + * A large number of bugs have been fixed for big-endian Mips targets using the N32 and N64 ABI's. Please note that some of these bugs will still affect LLVM-IR generated by LLVM 3.5 since correct code generation depends on |