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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 15:50:15 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-09 15:50:15 +0000 |
| commit | 06809a95c9aa171d59138156012fd7d14cef23c4 (patch) | |
| tree | ec6f47f3a0e14bcb1cfdeb199ba3bf88d68940fa | |
| parent | c499fcb1a416dcf7be31732e6d3c2d901da0f430 (diff) | |
| download | llvm-06809a95c9aa171d59138156012fd7d14cef23c4.zip llvm-06809a95c9aa171d59138156012fd7d14cef23c4.tar.gz llvm-06809a95c9aa171d59138156012fd7d14cef23c4.tar.bz2 | |
Merging r200705:
------------------------------------------------------------------------
r200705 | hfinkel | 2014-02-03 12:27:25 -0500 (Mon, 03 Feb 2014) | 5 lines
Expand vector bswap in LegalizeVectorOps
ISD::BSWAP was missing from the list of node types that should be expanded
element-wise.
llvm-svn: 205910
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/bswap-vector.ll | 19 |
2 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 2c3cdcc..3fb2d9b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -210,6 +210,7 @@ SDValue VectorLegalizer::LegalizeOp(SDValue Op) { case ISD::SRL: case ISD::ROTL: case ISD::ROTR: + case ISD::BSWAP: case ISD::CTLZ: case ISD::CTTZ: case ISD::CTLZ_ZERO_UNDEF: diff --git a/llvm/test/CodeGen/X86/bswap-vector.ll b/llvm/test/CodeGen/X86/bswap-vector.ll new file mode 100644 index 0000000..7a7a8a4 --- /dev/null +++ b/llvm/test/CodeGen/X86/bswap-vector.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mcpu=core | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) + +define <2 x i64> @foo(<2 x i64> %v) #0 { +entry: + %r = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v) + ret <2 x i64> %r +} + +; CHECK-LABEL: @foo +; CHECK: bswapq +; CHECK: bswapq +; CHECK: ret + +attributes #0 = { nounwind uwtable } + |