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author | Duncan Sands <baldrick@free.fr> | 2013-06-06 07:44:31 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2013-06-06 07:44:31 +0000 |
commit | 084868f2ff2128c0f66f367a5e1bda1806aa8f98 (patch) | |
tree | e71686f6e2a9f37a12d0623fa5aae64a91b589ba | |
parent | f8c129801fb7ff74229051a4da0abd08d6d7aa07 (diff) | |
download | llvm-084868f2ff2128c0f66f367a5e1bda1806aa8f98.zip llvm-084868f2ff2128c0f66f367a5e1bda1806aa8f98.tar.gz llvm-084868f2ff2128c0f66f367a5e1bda1806aa8f98.tar.bz2 |
Add missing space.
llvm-svn: 183386
-rw-r--r-- | llvm/docs/ReleaseNotes.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 501a2a6..5808e0e 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -85,7 +85,7 @@ Hexagon Target -------------- Removed support for legacy hexagonv2 and hexagonv3 processor architectures which -are no longer in use. Currently supported architectures arehexagonv4 and +are no longer in use. Currently supported architectures are hexagonv4 and hexagonv5. Mips target |