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| author | Evan Cheng <evan.cheng@apple.com> | 2008-05-10 00:58:41 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-10 00:58:41 +0000 |
| commit | bb48d55a88da0eed534043fa2196f838e0f2b480 (patch) | |
| tree | ddef0daa70e22a7c648a27346948b47b967df00b | |
| parent | bec201fa06e1d7ddc7c96a5e0fb6a2d1d59f8baa (diff) | |
| download | llvm-bb48d55a88da0eed534043fa2196f838e0f2b480.zip llvm-bb48d55a88da0eed534043fa2196f838e0f2b480.tar.gz llvm-bb48d55a88da0eed534043fa2196f838e0f2b480.tar.bz2 | |
If movl top bits are undef, let it be selected to movlps, etc.
llvm-svn: 50928
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e9605bb..b30a13c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6326,8 +6326,7 @@ static SDOperand PerformBuildVectorCombine(SDNode *N, SelectionDAG &DAG, return SDOperand(); // This must be an insertion into a zero vector. SDOperand HighElt = N->getOperand(1); - if (HighElt.getOpcode() != ISD::UNDEF && - !isZeroNode(HighElt)) + if (!isZeroNode(HighElt)) return SDOperand(); // Value must be a load. |