[m88k] Add subtarget feature for procs and cache info

- Adds SubtargetFeature<> for both processors
- Implement methods returning info about cache structure

3 files changed, 71 insertions, 6 deletions

diff --git a/llvm/lib/Target/M88k/M88k.td b/llvm/lib/Target/M88k/M88k.td
index f4d3413..78cd6f4 100644
--- a/llvm/lib/Target/M88k/M88k.td
+++ b/llvm/lib/Target/M88k/M88k.td
@@ -32,11 +32,20 @@ include "M88kCombine.td"
 include "M88kSchedule.td"
 
 //===----------------------------------------------------------------------===//
+// M88k subtarget features.
+//===----------------------------------------------------------------------===//
+
+def Proc88100      : SubtargetFeature<"mc88100", "M88kProc", "MC88100",
+                                      "Motorola 88100 processor", []>;
+def Proc88110      : SubtargetFeature<"mc88110", "M88kProc", "MC88110",
+                                      "Motorola 88110 processor", []>;
+
+//===----------------------------------------------------------------------===//
 // M88k processors supported.
 //===----------------------------------------------------------------------===//
 
-def : ProcessorModel<"mc88100", M88100SchedModel, []>;
-def : ProcessorModel<"mc88110", M88110SchedModel, []>;
+def : ProcessorModel<"mc88100", M88100SchedModel, [Proc88100]>;
+def : ProcessorModel<"mc88110", M88110SchedModel, [Proc88110]>;
 
 //===----------------------------------------------------------------------===//
 // Declare the target which we are implementing
diff --git a/llvm/lib/Target/M88k/M88kSubtarget.cpp b/llvm/lib/Target/M88k/M88kSubtarget.cpp
index efb55c4..cc79f3e 100644
--- a/llvm/lib/Target/M88k/M88kSubtarget.cpp
+++ b/llvm/lib/Target/M88k/M88kSubtarget.cpp
@@ -27,8 +27,6 @@ using namespace llvm;
 #define GET_SUBTARGETINFO_CTOR
 #include "M88kGenSubtargetInfo.inc"
 
-void M88kSubtarget::anchor() {}
-
 M88kSubtarget::M88kSubtarget(const Triple &TT, const std::string &CPU,
                              const std::string &FS, const TargetMachine &TM)
     : M88kGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), TargetTriple(TT),
@@ -41,3 +39,42 @@ M88kSubtarget::M88kSubtarget(const Triple &TT, const std::string &CPU,
   InstSelector.reset(createM88kInstructionSelector(
       *static_cast<const M88kTargetMachine *>(&TM), *this, *RBI));
 }
+
+Optional<unsigned> M88kSubtarget::getCacheSize(unsigned Level) const {
+  if (Level > 0)
+    return Optional<unsigned>();
+  switch (M88kProc) {
+  case MC88100:
+    return 16 * 1024; // 16k sharec I+D cache.
+  case MC88110:
+    return 8 * 1024; // 8k sharec D cache.
+  default:
+    return Optional<unsigned>();
+  }
+}
+
+Optional<unsigned> M88kSubtarget::getCacheAssociativity(unsigned Level) const {
+  if (Level > 0)
+    return Optional<unsigned>();
+  switch (M88kProc) {
+  case MC88100:
+    return 4; // Cache is 4-way associative.
+  case MC88110:
+    return 2; // Cache is 4-way associative.
+  default:
+    return Optional<unsigned>();
+  }
+}
+
+Optional<unsigned> M88kSubtarget::getCacheLineSize(unsigned Level) const {
+  if (Level > 0)
+    return Optional<unsigned>();
+  switch (M88kProc) {
+  case MC88100:
+    return 16; // 4 bytes.
+  case MC88110:
+    return 32; // 8 words.
+  default:
+    return Optional<unsigned>();
+  }
+}
diff --git a/llvm/lib/Target/M88k/M88kSubtarget.h b/llvm/lib/Target/M88k/M88kSubtarget.h
index e482c64..33b9602 100644
--- a/llvm/lib/Target/M88k/M88kSubtarget.h
+++ b/llvm/lib/Target/M88k/M88kSubtarget.h
@@ -17,6 +17,7 @@
 #include "M88kISelLowering.h"
 #include "M88kInstrInfo.h"
 #include "M88kRegisterInfo.h"
+#include "llvm/ADT/Optional.h"
 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
@@ -34,20 +35,33 @@ namespace llvm {
 class StringRef;
 
 class M88kSubtarget : public M88kGenSubtargetInfo {
+  enum M88kProcEnum {
+    None,
+    MC88100,
+    MC88110,
+  };
+
+// Bool members corresponding to the SubtargetFeatures defined in tablegen
+#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \
+  bool ATTRIBUTE = DEFAULT;
+#include "M88kGenSubtargetInfo.inc"
+
+  M88kProcEnum M88kProc;
+
   Triple TargetTriple;
-  virtual void anchor();
 
   M88kInstrInfo InstrInfo;
   M88kTargetLowering TLInfo;
   // SelectionDAGTargetInfo TSInfo;
   M88kFrameLowering FrameLowering;
 
-  /// GlobalISel related APIs.
+  // GlobalISel related APIs.
   std::unique_ptr<CallLowering> CallLoweringInfo;
   std::unique_ptr<LegalizerInfo> Legalizer;
   std::unique_ptr<RegisterBankInfo> RegBankInfo;
   std::unique_ptr<InstructionSelector> InstSelector;
 
+
 public:
   M88kSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
                 const TargetMachine &TM);
@@ -55,6 +69,11 @@ public:
   // Automatically generated by tblgen.
   void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
 
+  // Return information about cache structure.
+  Optional<unsigned> getCacheSize(unsigned Level) const override;
+  Optional<unsigned> getCacheAssociativity(unsigned Level) const override;
+  Optional<unsigned> getCacheLineSize(unsigned Level) const override;
+
   const TargetFrameLowering *getFrameLowering() const override {
     return &FrameLowering;
   }