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| author | Kai Nacke <kai@redstar.de> | 2022-07-08 06:54:02 -0400 |
|---|---|---|
| committer | Kai Nacke <kai@redstar.de> | 2022-11-13 11:07:31 -0500 |
| commit | 878537b47b78bd5e895b43c9611ff3e7e219956f (patch) | |
| tree | 54a5eb42bf5333b49f3b4fa3f3872031aa04d1cc | |
| parent | 3f18b8cee603c25a96dc1ac092414128507c7f5f (diff) | |
| download | llvm-878537b47b78bd5e895b43c9611ff3e7e219956f.zip llvm-878537b47b78bd5e895b43c9611ff3e7e219956f.tar.gz llvm-878537b47b78bd5e895b43c9611ff3e7e219956f.tar.bz2 | |
[m88k] Add G_PTR_ADD
| -rw-r--r-- | llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp index 5018c03..33711be 100644 --- a/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kInstructionSelector.cpp @@ -69,6 +69,8 @@ private: MachineRegisterInfo &MRI) const; bool selectCondBr(MachineInstr &I, MachineBasicBlock &MBB, MachineRegisterInfo &MRI) const; + bool selectPtrAdd(MachineInstr &I, MachineBasicBlock &MBB, + MachineRegisterInfo &MRI) const; bool selectLoadStore(MachineInstr &I, MachineBasicBlock &MBB, MachineRegisterInfo &MRI) const; bool selectMergeUnmerge(MachineInstr &I, MachineBasicBlock &MBB, @@ -419,6 +421,31 @@ bool M88kInstructionSelector::selectCondBr(MachineInstr &I, return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); } +bool M88kInstructionSelector::selectPtrAdd(MachineInstr &I, + MachineBasicBlock &MBB, + MachineRegisterInfo &MRI) const { + assert(I.getOpcode() == TargetOpcode::G_PTR_ADD && "Unexpected G code"); + + MachineInstr *MI = nullptr; + Register PtrReg = I.getOperand(1).getReg(); + Register AddendReg = I.getOperand(2).getReg(); + + int64_t Offset; + if (mi_match(AddendReg, MRI, m_ICst(Offset)) && isUInt<16>(Offset)) { + MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::ADDUri), + I.getOperand(0).getReg()) + .addReg(PtrReg) + .addImm(Offset); + } else { + MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(M88k::ADDrr), + I.getOperand(0).getReg()) + .addReg(PtrReg) + .addReg(AddendReg); + } + I.eraseFromParent(); + return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); +} + enum class LoadStore : unsigned { Imm = 0, RegUnscaled, @@ -817,6 +844,8 @@ bool M88kInstructionSelector::select(MachineInstr &I) { return selectIntrinsic(I, MBB, MRI); case TargetOpcode::G_GLOBAL_VALUE: return selectGlobalValue(I, MBB, MRI); + case TargetOpcode::G_PTR_ADD: + return selectPtrAdd(I, MBB, MRI); case TargetOpcode::G_UBFX: case TargetOpcode::G_SBFX: case TargetOpcode::G_SEXT_INREG: |