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author | Kai Nacke <kai@redstar.de> | 2022-06-03 19:22:57 -0400 |
---|---|---|
committer | Kai Nacke <kai@redstar.de> | 2022-11-13 11:07:17 -0500 |
commit | 65987fdab583cac18bd2ea45a85417d5d742854a (patch) | |
tree | 98ae447fb0f568a53945e6721bb478fb67faf0bb | |
parent | 530cdff5497a223745ab1e8e1c00f617a27b2948 (diff) | |
download | llvm-65987fdab583cac18bd2ea45a85417d5d742854a.zip llvm-65987fdab583cac18bd2ea45a85417d5d742854a.tar.gz llvm-65987fdab583cac18bd2ea45a85417d5d742854a.tar.bz2 |
[m88k] Enable delay slot filler by default.
-rw-r--r-- | llvm/lib/Target/M88k/M88kTargetMachine.cpp | 13 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/and.ll | 16 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/callee.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/cond.ll | 12 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/load.ll | 10 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/or.ll | 12 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/shift.ll | 22 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/store.ll | 6 | ||||
-rw-r--r-- | llvm/test/CodeGen/M88k/xor.ll | 10 |
9 files changed, 55 insertions, 50 deletions
diff --git a/llvm/lib/Target/M88k/M88kTargetMachine.cpp b/llvm/lib/Target/M88k/M88kTargetMachine.cpp index 7d1a0dd..a7dddbb 100644 --- a/llvm/lib/Target/M88k/M88kTargetMachine.cpp +++ b/llvm/lib/Target/M88k/M88kTargetMachine.cpp @@ -31,9 +31,9 @@ static cl::opt<bool> BranchRelaxation("m88k-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches")); -static cl::opt<bool> - DisableDelaySlotFiller("disable-m88k-delay-slot-filler", cl::init(true), - cl::desc("Do not fill delay slots."), cl::Hidden); +static cl::opt<cl::boolOrDefault> + EnableDelaySlotFiller("m88k-enable-delay-slot-filler", + cl::desc("Fill delay slots."), cl::Hidden); extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeM88kTarget() { // Register the target and target specific passes. @@ -166,7 +166,12 @@ void M88kPassConfig::addPreEmitPass() { if (BranchRelaxation) addPass(&BranchRelaxationPassID); - if (!DisableDelaySlotFiller) + // Enable the delay slot filler for optimizing builds or if explicitly + // requested. + // TODO: When targetting MC88110 it might be better to not enable it. + if ((getOptLevel() != CodeGenOpt::None && + EnableDelaySlotFiller != cl::BOU_FALSE) || + EnableDelaySlotFiller == cl::BOU_TRUE) addPass(createM88kDelaySlotFiller()); } diff --git a/llvm/test/CodeGen/M88k/and.ll b/llvm/test/CodeGen/M88k/and.ll index b2b63a7..5c09261 100644 --- a/llvm/test/CodeGen/M88k/and.ll +++ b/llvm/test/CodeGen/M88k/and.ll @@ -6,8 +6,8 @@ ; Check two register operands. define i32 @f1(i32 %a, i32 %b) { ; CHECK-LABEL: f1: +; CHECK: jmp.n %r1 ; CHECK: and %r2, %r2, %r3 -; CHECK: jmp %r1 %res = and i32 %a, %b ret i32 %res } @@ -15,8 +15,8 @@ define i32 @f1(i32 %a, i32 %b) { ; Check two register operands, second operand inverted. define i32 @f2(i32 %a, i32 %b) { ; CHECK-LABEL: f2: +; CHECK: jmp.n %r1 ; CHECK: and.c %r2, %r2, %r3 -; CHECK: jmp %r1 %notb = xor i32 %b, -1 %res = and i32 %a, %notb ret i32 %res @@ -25,8 +25,8 @@ define i32 @f2(i32 %a, i32 %b) { ; Check immediate in low 16 bits, high 16 bits clear. define i32 @f3(i32 %a) { ; CHECK-LABEL: f3: +; CHECK: jmp.n %r1 ; CHECK: mask %r2, %r2, 51966 -; CHECK: jmp %r1 %res = and i32 %a, 51966 ret i32 %res } @@ -34,8 +34,8 @@ define i32 @f3(i32 %a) { ; Check immediate in low 16 bits, high 16 bits set. define i32 @f4(i32 %a) { ; CHECK-LABEL: f4: +; CHECK: jmp.n %r1 ; CHECK: and %r2, %r2, 57005 -; CHECK: jmp %r1 %res = and i32 %a, 4294958765 ; = 0xFFFFDEAD ret i32 %res } @@ -43,8 +43,8 @@ define i32 @f4(i32 %a) { ; Check immediate in high 16 bits, low 16 bits clear. define i32 @f5(i32 %a) { ; CHECK-LABEL: f5: +; CHECK: jmp.n %r1 ; CHECK: mask.u %r2, %r2, 47806 -; CHECK: jmp %r1 %res = and i32 %a, 3133014016 ; = 0xBABE0000 ret i32 %res } @@ -52,8 +52,8 @@ define i32 @f5(i32 %a) { ; Check immediate in high 16 bits, low 16 bits set. define i32 @f6(i32 %a) { ; CHECK-LABEL: f6: +; CHECK: jmp.n %r1 ; CHECK: and.u %r2, %r2, 47806 -; CHECK: jmp %r1 %res = and i32 %a, 3133079551 ; = 0xBABEFFFF ret i32 %res } @@ -62,8 +62,8 @@ define i32 @f6(i32 %a) { define i32 @f7(i32 %a) { ; CHECK-LABEL: f7: ; CHECK: and.u %r2, %r2, 61680 +; CHECK: jmp.n %r1 ; CHECK: and %r2, %r2, 61680 -; CHECK: jmp %r1 %res = and i32 %a, 4042322160 ; = 0xF0F0F0F0 ret i32 %res } @@ -71,8 +71,8 @@ define i32 @f7(i32 %a) { ; Check inverted mask. define i32 @f8(i32 %a) { ; CHECK-LABEL: f8: +; CHECK: jmp.n %r1 ; CHECK: clr %r2, %r2, 16<8> -; CHECK: jmp %r1 %res = and i32 %a, 4278190335 ; = 0xFF0000FF ret i32 %res } diff --git a/llvm/test/CodeGen/M88k/callee.ll b/llvm/test/CodeGen/M88k/callee.ll index 7ec06b3..fab160c 100644 --- a/llvm/test/CodeGen/M88k/callee.ll +++ b/llvm/test/CodeGen/M88k/callee.ll @@ -1,7 +1,7 @@ ; Test argument passing and stack frame construction, callee side. ; -; RUN: llc < %s -mtriple=m88k-openbsd -mcpu=mc88100 | FileCheck %s -; RUN: llc < %s -mtriple=m88k-openbsd -mcpu=mc88110 | FileCheck %s +; RUN: llc < %s -mtriple=m88k-openbsd -mcpu=mc88100 -O0 | FileCheck %s +; RUN: llc < %s -mtriple=m88k-openbsd -mcpu=mc88110 -O0 | FileCheck %s ; Registers r2 to r9 used, no parameter passed on stack. define i32 @f1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) { diff --git a/llvm/test/CodeGen/M88k/cond.ll b/llvm/test/CodeGen/M88k/cond.ll index d57cf4f..68c2acf 100644 --- a/llvm/test/CodeGen/M88k/cond.ll +++ b/llvm/test/CodeGen/M88k/cond.ll @@ -5,9 +5,9 @@ define i32 @f1(i32 %a, i32 %b) { ; CHECK-LABEL: f1: -; CHECK: bcnd ne0, %r2, .LBB0_{{[0-9]}} -; CHECK: jmp %r1 -; CHECK: jmp %r1 +; CHECK: bcnd.n ne0, %r2, .LBB0_{{[0-9]}} +; CHECK: jmp.n %r1 +; CHECK: jmp.n %r1 %cmp = icmp eq i32 %a, 0 br i1 %cmp, label %compute, label %exit @@ -22,9 +22,9 @@ exit: define i32 @f2(i32 %a, i32 %b) { ; CHECK-LABEL: f2: ; CHECK: cmp [[REG:%r[0-9]+]], %r2, %r3 -; CHECK-NEXT: bb1 2, [[REG]], .{{[A-Z0-9]+}} -; CHECK: jmp %r1 -; CHECK: jmp %r1 +; CHECK-NEXT: bb1.n 2, [[REG]], .{{[A-Z0-9]+}} +; CHECK: jmp.n %r1 +; CHECK: jmp.n %r1 %cmp = icmp ne i32 %a, %b br i1 %cmp, label %compute, label %exit diff --git a/llvm/test/CodeGen/M88k/load.ll b/llvm/test/CodeGen/M88k/load.ll index 9be7e9a..7d5e6c0 100644 --- a/llvm/test/CodeGen/M88k/load.ll +++ b/llvm/test/CodeGen/M88k/load.ll @@ -10,8 +10,8 @@ define i32 @get_mem32() { ; CHECK-LABEL: get_mem32: ; CHECK: or.u %r2, %r0, %hi16(mem32) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: ld %r2, %r2, %lo16(mem32) -; CHECK-NEXT: jmp %r1 %res = load i32, i32* @mem32, align 4 ret i32 %res } @@ -19,8 +19,8 @@ define i32 @get_mem32() { define i32 @get_mem16s() { ; CHECK-LABEL: get_mem16s: ; CHECK: or.u %r2, %r0, %hi16(mem16) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: ld.h %r2, %r2, %lo16(mem16) -; CHECK-NEXT: jmp %r1 %val = load i16, i16* @mem16, align 2 %res = sext i16 %val to i32 ret i32 %res @@ -29,8 +29,8 @@ define i32 @get_mem16s() { define i32 @get_mem16u() { ; CHECK-LABEL: get_mem16u: ; CHECK: or.u %r2, %r0, %hi16(mem16) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: ld.hu %r2, %r2, %lo16(mem16) -; CHECK-NEXT: jmp %r1 %val = load i16, i16* @mem16, align 2 %res = zext i16 %val to i32 ret i32 %res @@ -39,8 +39,8 @@ define i32 @get_mem16u() { define i32 @get_mem8s() { ; CHECK-LABEL: get_mem8s: ; CHECK: or.u %r2, %r0, %hi16(mem8) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: ld.b %r2, %r2, %lo16(mem8) -; CHECK-NEXT: jmp %r1 %val = load i8, i8* @mem8, align 2 %res = sext i8 %val to i32 ret i32 %res @@ -49,8 +49,8 @@ define i32 @get_mem8s() { define i32 @get_mem8u() { ; CHECK-LABEL: get_mem8u: ; CHECK: or.u %r2, %r0, %hi16(mem8) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: ld.bu %r2, %r2, %lo16(mem8) -; CHECK-NEXT: jmp %r1 %val = load i8, i8* @mem8, align 2 %res = zext i8 %val to i32 ret i32 %res diff --git a/llvm/test/CodeGen/M88k/or.ll b/llvm/test/CodeGen/M88k/or.ll index 719436f..d236156 100644 --- a/llvm/test/CodeGen/M88k/or.ll +++ b/llvm/test/CodeGen/M88k/or.ll @@ -6,8 +6,8 @@ ; Check two register operands. define i32 @f1(i32 %a, i32 %b) { ; CHECK-LABEL: f1: +; CHECK: jmp.n %r1 ; CHECK: or %r2, %r2, %r3 -; CHECK: jmp %r1 %res = or i32 %a, %b ret i32 %res } @@ -15,8 +15,8 @@ define i32 @f1(i32 %a, i32 %b) { ; Check two register operands, second operand inverted. define i32 @f2(i32 %a, i32 %b) { ; CHECK-LABEL: f2: +; CHECK: jmp.n %r1 ; CHECK: or.c %r2, %r2, %r3 -; CHECK: jmp %r1 %notb = xor i32 %b, -1 %res = or i32 %a, %notb ret i32 %res @@ -25,8 +25,8 @@ define i32 @f2(i32 %a, i32 %b) { ; Check immediate in low 16 bits, high 16 bits clear. define i32 @f3(i32 %a) { ; CHECK-LABEL: f3: +; CHECK: jmp.n %r1 ; CHECK: or %r2, %r2, 160 -; CHECK: jmp %r1 %res = or i32 %a, 160 ; = 0xA0 ret i32 %res } @@ -34,8 +34,8 @@ define i32 @f3(i32 %a) { ; Check immediate in high 16 bits, low 16 bits set. define i32 @f4(i32 %a) { ; CHECK-LABEL: f4: +; CHECK: jmp.n %r1 ; CHECK: or.u %r2, %r2, 47806 -; CHECK: jmp %r1 %res = or i32 %a, 3133014016 ; = 0xBABE0000 ret i32 %res } @@ -44,8 +44,8 @@ define i32 @f4(i32 %a) { define i32 @f5(i32 %a) { ; CHECK-LABEL: f5: ; CHECK: or.u %r2, %r2, 61680 +; CHECK: jmp.n %r1 ; CHECK: or %r2, %r2, 61680 -; CHECK: jmp %r1 %res = or i32 %a, 4042322160 ; = 0xF0F0F0F0 ret i32 %res } @@ -53,8 +53,8 @@ define i32 @f5(i32 %a) { ; Check mask. define i32 @f6(i32 %a) { ; CHECK-LABEL: f6: +; CHECK: jmp.n %r1 ; CHECK: set %r2, %r2, 16<8> -; CHECK: jmp %r1 %res = or i32 %a, 16776960 ; 0x00FFFF00 ret i32 %res } diff --git a/llvm/test/CodeGen/M88k/shift.ll b/llvm/test/CodeGen/M88k/shift.ll index ebf06cf..ac869a1 100644 --- a/llvm/test/CodeGen/M88k/shift.ll +++ b/llvm/test/CodeGen/M88k/shift.ll @@ -6,8 +6,8 @@ ; Check two register operands. define i32 @f1(i32 %a, i32 %b) { ; CHECK-LABEL: f1: +; CHECK: jmp.n %r1 ; CHECK: mak %r2, %r2, %r3 -; CHECK: jmp %r1 %res = shl i32 %a, %b ret i32 %res } @@ -15,8 +15,8 @@ define i32 @f1(i32 %a, i32 %b) { ; Check two register operands. define i32 @f2(i32 %a, i32 %b) { ; CHECK-LABEL: f2: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, %r3 -; CHECK: jmp %r1 %res = lshr i32 %a, %b ret i32 %res } @@ -24,8 +24,8 @@ define i32 @f2(i32 %a, i32 %b) { ; Check two register operands. define i32 @f3(i32 %a, i32 %b) { ; CHECK-LABEL: f3: +; CHECK: jmp.n %r1 ; CHECK: ext %r2, %r2, %r3 -; CHECK: jmp %r1 %res = ashr i32 %a, %b ret i32 %res } @@ -33,8 +33,8 @@ define i32 @f3(i32 %a, i32 %b) { ; Check immediate operand. define i32 @f4(i32 %a) { ; CHECK-LABEL: f4: +; CHECK: jmp.n %r1 ; CHECK: mak %r2, %r2, 0<2> -; CHECK: jmp %r1 %res = shl i32 %a, 2 ret i32 %res } @@ -42,8 +42,8 @@ define i32 @f4(i32 %a) { ; Check combine logical shift right and and. define i32 @f5(i32 %a) { ; CHECK-LABEL: f5: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, 5<1> -; CHECK: jmp %r1 %shift = lshr i32 %a, 1 %res = and i32 %shift, 31 ret i32 %res @@ -52,8 +52,8 @@ define i32 @f5(i32 %a) { ; Check combine arithmetic shift right and and. define i32 @f6(i32 %a) { ; CHECK-LABEL: f6: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, 5<1> -; CHECK: jmp %r1 %shift = ashr i32 %a, 1 %res = and i32 %shift, 31 ret i32 %res @@ -62,8 +62,8 @@ define i32 @f6(i32 %a) { ; Check combine and and logical shift right. define i32 @f7(i32 %a) { ; CHECK-LABEL: f7: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, 5<1> -; CHECK: jmp %r1 %and = and i32 %a, 62 %res = lshr i32 %and, 1 ret i32 %res @@ -72,8 +72,8 @@ define i32 @f7(i32 %a) { ; Check combine and and arithmetic shift right. define i32 @f8(i32 %a) { ; CHECK-LABEL: f8: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, 5<1> -; CHECK: jmp %r1 %and = and i32 %a, 62 %res = ashr i32 %and, 1 ret i32 %res @@ -82,8 +82,8 @@ define i32 @f8(i32 %a) { ; Check combine and and shift left. define i32 @f9(i32 %a) { ; CHECK-LABEL: f9: +; CHECK: jmp.n %r1 ; CHECK: mak %r2, %r2, 8<15> -; CHECK: jmp %r1 %and = and i32 %a, 255 %res = shl i32 %and, 15 ret i32 %res @@ -92,8 +92,8 @@ define i32 @f9(i32 %a) { ; Check combine shift left and logical shift right. define i32 @f10(i32 %a) { ; CHECK-LABEL: f10: +; CHECK: jmp.n %r1 ; CHECK: extu %r2, %r2, 16<8> -; CHECK: jmp %r1 %shl = shl i32 %a, 8 %res = lshr i32 %shl, 16 ret i32 %res @@ -102,8 +102,8 @@ define i32 @f10(i32 %a) { ; Check combine shift left and arithmetic shift right. define i32 @f11(i32 %a) { ; CHECK-LABEL: f11: +; CHECK: jmp.n %r1 ; CHECK: ext %r2, %r2, 16<8> -; CHECK: jmp %r1 %shl = shl i32 %a, 8 %res = ashr i32 %shl, 16 ret i32 %res diff --git a/llvm/test/CodeGen/M88k/store.ll b/llvm/test/CodeGen/M88k/store.ll index b2f9c66..557d5a7 100644 --- a/llvm/test/CodeGen/M88k/store.ll +++ b/llvm/test/CodeGen/M88k/store.ll @@ -10,8 +10,8 @@ define void @set_mem32(i32 %val) { ; CHECK-LABEL: set_mem32: ; CHECK: or.u %r3, %r0, %hi16(mem32) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: st %r2, %r3, %lo16(mem32) -; CHECK-NEXT: jmp %r1 store i32 %val, i32* @mem32, align 4 ret void } @@ -19,8 +19,8 @@ define void @set_mem32(i32 %val) { define void @set_mem16(i16 %val) { ; CHECK-LABEL: set_mem16: ; CHECK: or.u %r3, %r0, %hi16(mem16) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: st.h %r2, %r3, %lo16(mem16) -; CHECK-NEXT: jmp %r1 store i16 %val, i16* @mem16, align 2 ret void } @@ -28,8 +28,8 @@ define void @set_mem16(i16 %val) { define void @set_mem8(i8 %val) { ; CHECK-LABEL: set_mem8: ; CHECK: or.u %r3, %r0, %hi16(mem8) +; CHECK-NEXT: jmp.n %r1 ; CHECK-NEXT: st.b %r2, %r3, %lo16(mem8) -; CHECK-NEXT: jmp %r1 store i8 %val, i8* @mem8, align 1 ret void } diff --git a/llvm/test/CodeGen/M88k/xor.ll b/llvm/test/CodeGen/M88k/xor.ll index d7f07ad..383213d 100644 --- a/llvm/test/CodeGen/M88k/xor.ll +++ b/llvm/test/CodeGen/M88k/xor.ll @@ -6,8 +6,8 @@ ; Check two register operands. define i32 @f1(i32 %a, i32 %b) { ; CHECK-LABEL: f1: +; CHECK: jmp.n %r1 ; CHECK: xor %r2, %r2, %r3 -; CHECK: jmp %r1 %res = xor i32 %a, %b ret i32 %res } @@ -15,8 +15,8 @@ define i32 @f1(i32 %a, i32 %b) { ; Check two register operands, second operand inverted. define i32 @f2(i32 %a, i32 %b) { ; CHECK-LABEL: f2: +; CHECK: jmp.n %r1 ; CHECK: xor.c %r2, %r2, %r3 -; CHECK: jmp %r1 %notb = xor i32 %b, -1 %res = xor i32 %a, %notb ret i32 %res @@ -25,8 +25,8 @@ define i32 @f2(i32 %a, i32 %b) { ; Check immediate in low 16 bits, high 16 bits clear. define i32 @f3(i32 %a) { ; CHECK-LABEL: f3: +; CHECK: jmp.n %r1 ; CHECK: xor %r2, %r2, 255 -; CHECK: jmp %r1 %res = xor i32 %a, 255 ret i32 %res } @@ -34,8 +34,8 @@ define i32 @f3(i32 %a) { ; Check immediate in high 16 bits, low 16 bits set. define i32 @f4(i32 %a) { ; CHECK-LABEL: f4: +; CHECK: jmp.n %r1 ; CHECK: xor.u %r2, %r2, 47806 -; CHECK: jmp %r1 %res = xor i32 %a, 3133014016 ; = 0xBABE0000 ret i32 %res } @@ -44,8 +44,8 @@ define i32 @f4(i32 %a) { define i32 @func_f5(i32 %a) { ; CHECK-LABEL: f5: ; CHECK: xor.u %r2, %r2, 61680 +; CHECK: jmp.n %r1 ; CHECK: xor %r2, %r2, 61680 -; CHECK: jmp %r1 %res = xor i32 %a, 4042322160 ; = 0xF0F0F0F0 ret i32 %res } |