diff options
author | Kai Nacke <kai@redstar.de> | 2022-09-18 23:27:13 -0400 |
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committer | Kai Nacke <kai@redstar.de> | 2022-11-13 11:07:59 -0500 |
commit | 5d395d0abc920249adccc0a2247eea3f1676cb69 (patch) | |
tree | 3919f7b010e1fa23d777151c6c572646b44f9c3e | |
parent | 47ea0e89486918fec7603aea838b83bc90853a2a (diff) | |
download | llvm-5d395d0abc920249adccc0a2247eea3f1676cb69.zip llvm-5d395d0abc920249adccc0a2247eea3f1676cb69.tar.gz llvm-5d395d0abc920249adccc0a2247eea3f1676cb69.tar.bz2 |
[m88k] Use tree matcher in post-legalizer combiner
Since the tree matcher seems to work now, add match rules for
rules without commutable instructions.
-rw-r--r-- | llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp | 52 | ||||
-rw-r--r-- | llvm/lib/Target/M88k/M88kCombine.td | 18 |
2 files changed, 34 insertions, 36 deletions
diff --git a/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp b/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp index a20659a..ab72f62 100644 --- a/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kPostLegalizerCombiner.cpp @@ -115,21 +115,18 @@ bool matchAddSubFromAddICmp(MachineInstr &MI, MachineRegisterInfo &MRI, // Dst, UnusedCarry = G_USUBE SrcA, Zero, Carry // with SrcB' and SrcC' derived from SrcB and SrcC, inserting a zero constant // value if necessary. -bool matchSubSubFromSubICmp(MachineInstr &MI, MachineRegisterInfo &MRI, +bool matchSubSubFromSubICmp(MachineInstr &SubMI, MachineInstr &ICmpMI, MachineRegisterInfo &MRI, BuildFnTy &MatchInfo) { - assert(MI.getOpcode() == TargetOpcode::G_SUB); - - Register DstReg = MI.getOperand(0).getReg(); - Register SrcRegA; - Register SrcRegB; - Register SrcRegC; + assert(SubMI.getOpcode() == TargetOpcode::G_SUB); + assert(ICmpMI.getOpcode() == TargetOpcode::G_ICMP); + + Register DstReg = SubMI.getOperand(0).getReg(); + Register SrcRegA = SubMI.getOperand(1).getReg(); + CmpInst::Predicate Pred = + static_cast<CmpInst::Predicate>(ICmpMI.getOperand(1).getPredicate()); + Register SrcRegB = ICmpMI.getOperand(2).getReg(); + Register SrcRegC = ICmpMI.getOperand(3).getReg(); Register ZeroReg; - CmpInst::Predicate Pred; - if (!mi_match( - MI, MRI, - m_GSub(m_Reg(SrcRegA), m_GZExt(m_GICmp(m_Pred(Pred), m_Reg(SrcRegB), - m_Reg(SrcRegC)))))) - return false; switch (Pred) { case CmpInst::ICMP_UGT: @@ -167,30 +164,27 @@ bool matchSubSubFromSubICmp(MachineInstr &MI, MachineRegisterInfo &MRI, return true; } -// Match +// Given a match // Dst = G_SUB SrcA, (G_ZEXT (G_ICMP Pred, SrcB, SrcC) -// with: +// check: // - Pred = signed >= and SrcC equals zero // - Pred = signed <= and SrcB equals zero // The returned MatchInfo transforms this sequence into // Unused, Carry = G_UADDO SrcB', SrcC' // Dst, UnusedCarry = G_USUBE SrcA, Zero, Carry // with SrcB' and SrcC' derived from SrcB and SrcC. -bool matchSubAddFromSubICmp(MachineInstr &MI, MachineRegisterInfo &MRI, - BuildFnTy &MatchInfo) { - assert(MI.getOpcode() == TargetOpcode::G_SUB); - - Register DstReg = MI.getOperand(0).getReg(); - Register SrcRegA; - Register SrcRegB; - Register SrcRegC; +bool matchSubAddFromSubICmp(MachineInstr &SubMI, MachineInstr &ICmpMI, + MachineRegisterInfo &MRI, BuildFnTy &MatchInfo) { + assert(SubMI.getOpcode() == TargetOpcode::G_SUB); + assert(ICmpMI.getOpcode() == TargetOpcode::G_ICMP); + + Register DstReg = SubMI.getOperand(0).getReg(); + Register SrcRegA = SubMI.getOperand(1).getReg(); + CmpInst::Predicate Pred = + static_cast<CmpInst::Predicate>(ICmpMI.getOperand(1).getPredicate()); + Register SrcRegB = ICmpMI.getOperand(2).getReg(); + Register SrcRegC = ICmpMI.getOperand(3).getReg(); Register ZeroReg; - CmpInst::Predicate Pred; - if (!mi_match( - MI, MRI, - m_GSub(m_Reg(SrcRegA), m_GZExt(m_GICmp(m_Pred(Pred), m_Reg(SrcRegB), - m_Reg(SrcRegC)))))) - return false; switch (Pred) { case CmpInst::ICMP_SGE: diff --git a/llvm/lib/Target/M88k/M88kCombine.td b/llvm/lib/Target/M88k/M88kCombine.td index d11e930..ac764de 100644 --- a/llvm/lib/Target/M88k/M88kCombine.td +++ b/llvm/lib/Target/M88k/M88kCombine.td @@ -83,10 +83,13 @@ def addsub_from_addicmp : GICombineRule< // with SrcB' and SrcC' derived from SrcB and SrcC, inserting a zero constant // value if necessary. def subsub_from_subicmp : GICombineRule< - (defs root:$root, build_fn_matchinfo:$matchinfo), - (match (wip_match_opcode G_SUB):$root, - [{ return matchSubSubFromSubICmp(*${root}, MRI, ${matchinfo}); }]), - (apply [{ Helper.applyBuildFn(*${root}, ${matchinfo}); }])>; + (defs root:$dst, build_fn_matchinfo:$matchinfo), + (match (G_ICMP $icmp, $cc, $srcb, $srcc):$icmpmi, + (G_ZEXT $zext, $icmp), + (G_SUB $dst, $srca, $zext):$submi, + [{ return matchSubSubFromSubICmp(*${submi}, *${icmpmi}, MRI, + ${matchinfo}); }]), + (apply [{ Helper.applyBuildFn(*${submi}, ${matchinfo}); }])>; // Combine // Dst = G_SUB SrcA, (G_ZEXT (G_ICMP Pred, SrcB, SrcC) @@ -99,10 +102,11 @@ def subsub_from_subicmp : GICombineRule< // with SrcB' and SrcC' derived from SrcB and SrcC. def subadd_from_subicmp : GICombineRule< (defs root:$dst, build_fn_matchinfo:$matchinfo), - (match //(G_ICMP $icmp, $cc, $src2, $src3), + (match (G_ICMP $icmp, $cc, $srcb, $srcc):$icmpmi, (G_ZEXT $zext, $icmp), - (G_SUB $dst, $src1, $zext):$submi, - [{ return matchSubAddFromSubICmp(*${submi}, MRI, ${matchinfo}); }]), + (G_SUB $dst, $srca, $zext):$submi, + [{ return matchSubAddFromSubICmp(*${submi}, *${icmpmi}, MRI, + ${matchinfo}); }]), (apply [{ Helper.applyBuildFn(*${submi}, ${matchinfo}); }])>; // Combine |