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| author | Kai Nacke <kai@redstar.de> | 2022-08-09 06:49:32 -0400 |
|---|---|---|
| committer | Kai Nacke <kai@redstar.de> | 2022-11-13 11:07:42 -0500 |
| commit | 1a33ecbb6b86dd58c73de677addcdadd6e736008 (patch) | |
| tree | 9b209de443fe3267bda9f5363b0e17ebc80ad50f | |
| parent | cfb97cbeca964d2f7d5761f7c3438297235b7d96 (diff) | |
| download | llvm-1a33ecbb6b86dd58c73de677addcdadd6e736008.zip llvm-1a33ecbb6b86dd58c73de677addcdadd6e736008.tar.gz llvm-1a33ecbb6b86dd58c73de677addcdadd6e736008.tar.bz2 | |
[m88k] Add patterns for PADD and PSUB.
Also extend legalization to handle vector types.
| -rw-r--r-- | llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/M88k/M88kInstrInfo.td | 19 | ||||
| -rw-r--r-- | llvm/lib/Target/M88k/M88kRegisterInfo.td | 3 |
3 files changed, 21 insertions, 11 deletions
diff --git a/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp b/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp index fc435bb..8569b9e 100644 --- a/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp +++ b/llvm/lib/Target/M88k/GISel/M88kLegalizerInfo.cpp @@ -35,6 +35,9 @@ M88kLegalizerInfo::M88kLegalizerInfo(const M88kSubtarget &ST) { const LLT S32 = LLT::scalar(32); const LLT S64 = LLT::scalar(64); const LLT S80 = LLT::scalar(80); + const LLT V8S8 = LLT::fixed_vector(8, 8); + const LLT V4S16 = LLT::fixed_vector(4, 16); + const LLT V2S32 = LLT::fixed_vector(2, 32); const LLT P0 = LLT::pointer(0, 32); auto IsMC88110 = [=, &ST](const LegalityQuery &Query) { @@ -76,8 +79,11 @@ M88kLegalizerInfo::M88kLegalizerInfo(const M88kSubtarget &ST) { getActionDefinitionsBuilder(G_PTR_ADD) .legalFor({{P0, S32}}) .clampScalar(1, S32, S32); - getActionDefinitionsBuilder(G_ADD).legalFor({S32}); - getActionDefinitionsBuilder(G_SUB).legalFor({S32}); + getActionDefinitionsBuilder({G_ADD, G_SUB}) + .legalFor({S32}) + .legalIf( + all(typeInSet(0, {V8S8, V4S16, V2S32}), LegalityPredicate(IsMC88110))) + .clampScalar(0, S32, S32); getActionDefinitionsBuilder({G_MUL, G_UDIV}) .legalFor({S32}) .customIf(all(typeInSet(0, {S64}), LegalityPredicate(IsMC88110))) diff --git a/llvm/lib/Target/M88k/M88kInstrInfo.td b/llvm/lib/Target/M88k/M88kInstrInfo.td index 701f95e..90ee837 100644 --- a/llvm/lib/Target/M88k/M88kInstrInfo.td +++ b/llvm/lib/Target/M88k/M88kInstrInfo.td @@ -1277,16 +1277,19 @@ def FXCR : F_SFU1CR2<0b11001, (outs GPR:$rd), (ins GPR:$rs1, FCR:$cr), // Graphics/vector instructions. 881100 only. // ---------------------------------------------------------------------------// -multiclass PArithPixel<bits<5> func, string opc> { - def : F_SFU2<func, /*sat=*/ 0b00, /*ty=*/ 0b11, - (outs GPR64:$rd), (ins GPR64:$rs1, GPR64:$rs2), - opc>; +multiclass PArithPixel<bits<5> func, string opc, SDNode OpNode> { + def "": F_SFU2<func, /*sat=*/ 0b00, /*ty=*/ 0b11, + (outs GPR64:$rd), (ins GPR64:$rs1, GPR64:$rs2), + opc, + [(set v2i32:$rd, (OpNode v2i32:$rs1, v2i32:$rs2))]>; def b : F_SFU2<func, /*sat=*/ 0b00, /*ty=*/ 0b01, (outs GPR64:$rd), (ins GPR64:$rs1, GPR64:$rs2), - !strconcat(opc, ".b")>; + !strconcat(opc, ".b"), + [(set v8i8:$rd, (OpNode v8i8:$rs1, v8i8:$rs2))]>; def h : F_SFU2<func, /*sat=*/ 0b00, /*ty=*/ 0b10, (outs GPR64:$rd), (ins GPR64:$rs1, GPR64:$rs2), - !strconcat(opc, ".h")>; + !strconcat(opc, ".h"), + [(set v4i16:$rd, (OpNode v4i16:$rs1, v4i16:$rs2))]>; } multiclass PArithPixelSat<bits<5> func, string opc> { @@ -1350,8 +1353,8 @@ def PMUL : F_SFU2<0b00000, 0b00, 0b00, def PCMP : F_SFU2<0b00111, 0b00, 0b11, (outs GPR:$rd), (ins GPR64:$rs1, GPR64:$rs2), "pcmp">; -defm PADD : PArithPixel<0b00100, "padd">; -defm PSUB : PArithPixel<0b00110, "psub">; +defm PADD : PArithPixel<0b00100, "padd", add>; +defm PSUB : PArithPixel<0b00110, "psub", sub>; defm PADDS : PArithPixelSat<0b00100, "padds">; defm PSUBS : PArithPixelSat<0b00110, "psubs">; defm PPACK : PPack; diff --git a/llvm/lib/Target/M88k/M88kRegisterInfo.td b/llvm/lib/Target/M88k/M88kRegisterInfo.td index 4f37d54..ed217577 100644 --- a/llvm/lib/Target/M88k/M88kRegisterInfo.td +++ b/llvm/lib/Target/M88k/M88kRegisterInfo.td @@ -65,7 +65,8 @@ def GRPair : RegisterTuples<[sub_hi, sub_lo], [(add (sequence "R%u", 0, 30, 2)), (add (sequence "R%u", 1, 31, 2))]>; -defm GPR64 : M88kRegisterClass<[i64, f64], 64, 32, (add GRPair), 1, 2>; +defm GPR64 : M88kRegisterClass<[i64, f64, v8i8, v4i16, v2i32], 64, 32, + (add GRPair), 1, 2>; //defm GPR64 : M88kRegisterClass<[i64, f64], 64, 32, // (add R0_R1, R2_R3, R4_R5, R6_R7, R8_R9, |