Merging r338599:llvmorg-7.0.0-rc1

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r338599 | vlad.tsyrklevich | 2018-08-01 19:44:37 +0200 (Wed, 01 Aug 2018) | 16 lines

[X86] FastISel fall back on !absolute_symbol GVs

Summary:
D25878, which added support for !absolute_symbol for normal X86 ISel,
did not add support for materializing references to absolute symbols for
X86 FastISel. This causes build failures because FastISel generates
PC-relative relocations for absolute symbols. Fall back to normal ISel
for references to !absolute_symbol GVs. Fix for PR38200.

Reviewers: pcc, craig.topper

Reviewed By: pcc

Subscribers: hiraditya, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D50116
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llvm-svn: 338847

2 files changed, 32 insertions, 0 deletions

diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 35a1557..d082b42 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -738,6 +738,10 @@ bool X86FastISel::handleConstantAddresses(const Value *V, X86AddressMode &AM) {
     if (GV->isThreadLocal())
       return false;
 
+    // Can't handle !absolute_symbol references yet.
+    if (GV->isAbsoluteSymbolRef())
+      return false;
+
     // RIP-relative addresses can't have additional register operands, so if
     // we've already folded stuff into the addressing mode, just force the
     // global value into its own register, which we can use as the basereg.
diff --git a/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll b/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll
new file mode 100644
index 0000000..34e92e8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll
@@ -0,0 +1,28 @@
+; RUN: llc < %s | FileCheck %s
+; RUN: llc -relocation-model=pic < %s | FileCheck %s
+
+; Regression test for PR38200
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@bit_mask8 = external hidden global i8, !absolute_symbol !0
+
+declare void @f()
+
+define void @foo8(i8* %ptr) noinline optnone {
+  %load = load i8, i8* %ptr
+  ; CHECK: movl $bit_mask8, %ecx
+  %and = and i8 %load, ptrtoint (i8* @bit_mask8 to i8)
+  %icmp = icmp eq i8 %and, 0
+  br i1 %icmp, label %t, label %f
+
+t:
+  call void @f()
+  ret void
+
+f:
+  ret void
+}
+
+!0 = !{i64 0, i64 256}