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author | Tom Stellard <thomas.stellard@amd.com> | 2015-05-04 19:50:14 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2015-05-04 19:50:14 +0000 |
commit | 820b01a885e3bc8e231cd8fe86508235be783df1 (patch) | |
tree | 17fe9372cc65ffa84aa3c58e7fed344d0b737b61 | |
parent | 94692a7b4a120e3528ea0cde7210405602c16ca6 (diff) | |
download | llvm-820b01a885e3bc8e231cd8fe86508235be783df1.zip llvm-820b01a885e3bc8e231cd8fe86508235be783df1.tar.gz llvm-820b01a885e3bc8e231cd8fe86508235be783df1.tar.bz2 |
Merging r235662:
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r235662 | thomas.stellard | 2015-04-23 18:59:24 -0400 (Thu, 23 Apr 2015) | 2 lines
R600: Correctly lower CONCAT_VECTOR nodes with more than 2 operands
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llvm-svn: 236450
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 6 | ||||
-rw-r--r-- | llvm/test/CodeGen/R600/concat_vectors.ll | 11 |
2 files changed, 13 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index cd12935..b137053f 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -826,11 +826,9 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI, SDValue AMDGPUTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const { SmallVector<SDValue, 8> Args; - SDValue A = Op.getOperand(0); - SDValue B = Op.getOperand(1); - DAG.ExtractVectorElements(A, Args); - DAG.ExtractVectorElements(B, Args); + for (const SDUse &U : Op->ops()) + DAG.ExtractVectorElements(U.get(), Args); return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args); } diff --git a/llvm/test/CodeGen/R600/concat_vectors.ll b/llvm/test/CodeGen/R600/concat_vectors.ll index 6b3fae3..b27bed3 100644 --- a/llvm/test/CodeGen/R600/concat_vectors.ll +++ b/llvm/test/CodeGen/R600/concat_vectors.ll @@ -283,3 +283,14 @@ define void @test_concat_v16i16(<32 x i16> addrspace(1)* %out, <16 x i16> %a, <1 store <32 x i16> %concat, <32 x i16> addrspace(1)* %out, align 64 ret void } + +; FUNC-LABEL: {{^}}concat_vector_crash: +; SI: s_endpgm +define void @concat_vector_crash(<8 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) { +bb: + %tmp = load <2 x float> addrspace(1)* %in, align 4 + %tmp1 = shufflevector <2 x float> %tmp, <2 x float> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %tmp2 = shufflevector <8 x float> undef, <8 x float> %tmp1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9> + store <8 x float> %tmp2, <8 x float> addrspace(1)* %out, align 32 + ret void +} |