tblgen: remove duplicated newlines.

llvm-svn: 155038

3 files changed, 6 insertions, 6 deletions

diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index 4f5d58c..d4b02fb 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -2486,7 +2486,7 @@ static void InferFromPattern(const CodeGenInstruction &Inst,
     if (MayStore)
       PrintWarning(Inst.TheDef->getLoc(),
                    "mayStore flag explicitly set on "
-                   "instruction, but flag already inferred from pattern.\n");
+                   "instruction, but flag already inferred from pattern.");
     MayStore = true;
   }
 
@@ -2496,7 +2496,7 @@ static void InferFromPattern(const CodeGenInstruction &Inst,
     if (MayLoad)
       PrintWarning(Inst.TheDef->getLoc(),
                    "mayLoad flag explicitly set on "
-                   "instruction, but flag already inferred from pattern.\n");
+                   "instruction, but flag already inferred from pattern.");
     MayLoad = true;
   }
 
@@ -2504,7 +2504,7 @@ static void InferFromPattern(const CodeGenInstruction &Inst,
     if (HadPattern)
       PrintWarning(Inst.TheDef->getLoc(),
                    "neverHasSideEffects flag explicitly set on "
-                   "instruction, but flag already inferred from pattern.\n");
+                   "instruction, but flag already inferred from pattern.");
     HasSideEffects = false;
   }
 
@@ -2512,7 +2512,7 @@ static void InferFromPattern(const CodeGenInstruction &Inst,
     if (HasSideEffects)
       PrintWarning(Inst.TheDef->getLoc(),
                    "hasSideEffects flag explicitly set on "
-                   "instruction, but flag already inferred from pattern.\n");
+                   "instruction, but flag already inferred from pattern.");
     HasSideEffects = true;
   }
 
diff --git a/llvm/utils/TableGen/CodeGenRegisters.cpp b/llvm/utils/TableGen/CodeGenRegisters.cpp
index 85e33b1..45c5bb8 100644
--- a/llvm/utils/TableGen/CodeGenRegisters.cpp
+++ b/llvm/utils/TableGen/CodeGenRegisters.cpp
@@ -900,7 +900,7 @@ void CodeGenRegBank::computeComposites() {
               PrintWarning(Twine("SubRegIndex") + Idx1->getQualifiedName() +
                      " and " + Idx2->getQualifiedName() +
                      " compose ambiguously as " + Prev->getQualifiedName() +
-                     " or " + i1d->first->getQualifiedName() +"\n");
+                     " or " + i1d->first->getQualifiedName());
           }
         }
       }
diff --git a/llvm/utils/TableGen/RegisterInfoEmitter.cpp b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
index 748ffc5..97fcca3 100644
--- a/llvm/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/llvm/utils/TableGen/RegisterInfoEmitter.cpp
@@ -210,7 +210,7 @@ RegisterInfoEmitter::EmitRegMappingTables(raw_ostream &OS,
     maxLength = std::max((size_t)maxLength, RegNums.size());
     if (DwarfRegNums.count(Reg))
       PrintWarning(Reg->getLoc(), Twine("DWARF numbers for register ") +
-                   getQualifiedName(Reg) + "specified multiple times\n");
+                   getQualifiedName(Reg) + "specified multiple times");
     DwarfRegNums[Reg] = RegNums;
   }